XIAO alignment requirements

What are the memory alignment requirements of SAMD21 platform?

I notice that when compiling code for XIAO Arduino IDE compiler introduces padding bytes to store data variables at aligned boundaries, as opposed to AVR compiler tending to pack everything tightly at 1-byte boundary.

So, what are the requirements here and how strict are they? What will happen on unaligned access attempt? Does it crash? Or does it simply make it slower? Are the alignment requirements tied to the datatype size (e.g. 4-byte types - to 4-byte boundary) or is there a single global alignment requirement (e.g. everything at an even address)?