Spartan Edge IOSTANDARD for HDMI, CSI

Products & Technology Shields
#1

I have been looking through all of the examples for the Spartan Edge accelerator Board found at this Github Repository.

There has been a point of confusion for me, in that the constraint file for the MIPI to HDMI example’s constraint file has the IOSTANDARD settings configured for the camera cable to either LVDS_25 or HSUL_12. To my understanding, the IOSTANDARD setting does not adjust the output voltage of the FPGA, but instead is just to tell the FPGA what the corresponding voltages are being provided on the VCCo port (as seen here: https://forums.xilinx.com/t5/Welcome-Join/What-s-IOstandard/m-p/737197/highlight/true#M41875).

However, the SEA board does not appear to have any 1.2V or 2.5V connections to VCCo lines, and the post that I linked above suggests that setting the wrong IOSTANDARD can potentially damage the device.

Could someone please clarify the purpose of the why the constraint file is configured this way?

#2

The camera is feeding the fpga inputs. And for LVDS inputs the exact VCCIO voltage of the buffer is not that critical, it’s only important that the common mode range and the differential voltage swing is compatible between devices.

I’m not quite sure about HSUL_12, but googling around I see that some voltage differences between device and fpga are also ok, and it’s suggested to use internal vref then. And I do see some options about INTERNAL_VREF in .xdf file.

Now for the LVDS outputs - yes, that’s absolutely critical that vccio set to 2.5v, because with higher vccio the fpga would fry its output drivers. But here we have input-only scenario, so everything is ok even without dedicated 2.5v regulators.