Spartan Edge Accelerator Board - Layout/Routing Files - Is The FPGA 100% Routed?

Hello All,

Just wondering for the Spartan Edge Accelerator Board - is the design 100% routed?
Is there a constraints file for all of the I/O’s?

Are you guys making more of these - or is the current stock (like maybe 26 at DigiKey) - all that’s left?

Thanks!
John