I have little experience with this module and ran into a similar problem. Turns out, I had forgotten to set CR+LF in my terminal. I just did that for RX and TX and it now works fine.
I used Tera Term with the following settings
Baud: 9600
Data : 8
Parity: none
Stop bits: 1
Flow Control: None
Then under (Setup>New-line)
Receive (CR+LF)
Transmit(CR+LF)
Hopefully, this helps out another rookie. Any corrections to my solution are welcome, as I am still a novice to using UART in practical design.