ODYSSEY STM32MP157C ARM Trusted Firmware support?

Has ATF been ported to the Seed SoM and the ODYSSEY? I imagine it would require adding the device tree at the very least

Stm32mp157c is ATF supported, default support, Seeed does not need to do anything.
https://www.st.com/content/st_com/en/stm32trust.html

That makes sense- however neither building the ATF or using the OpenSTLinux ATF image seems to work. I load it using STM32CubeProgrammer and then it stops responding. Flashing it to the eMMC boot partition manually shows that when it boots it has an ATF panic. In contrast I can load U-Boot SPL then load U-Bootā€™s SPL again. Iā€™m not sure if this is due to my board setup, so it would be good to know if this has been tested or thereā€™s an official image I can try.

One thing I noticed is that in the ATF tree the PMIC and eMMC are on the wrong buses for the SoM. Even correcting that didnā€™t help. Could it be failing to bring up the RAM somehow?

Alright, so 8 hours later I have a few answers:

  1. Mainline ATF runs with device tree modifications to use sdmmc2 for eMMC and find the PMIC on the I2C bus 2. Note that this doesnā€™t fix up the PMIC device tree to use the right values for the LDOs.
diff --git a/fdts/stm32mp157-pinctrl.dtsi b/fdts/stm32mp157-pinctrl.dtsi
index 7fd902bd2..0d6096121 100644
--- a/fdts/stm32mp157-pinctrl.dtsi
+++ b/fdts/stm32mp157-pinctrl.dtsi
@@ -239,6 +239,16 @@
                                };
                        };
 
+                        i2c2_pins_a: i2c2-0 {
+                                pins {
+                                        pinmux = <STM32_PINMUX('H', 4, AF4)>, /* I2C2_SCL */
+                                                 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
+                                        bias-disable;
+                                        drive-open-drain;
+                                        slew-rate = <0>;
+                                };
+                        };
+
                        sdmmc2_b4_pins_a: sdmmc2-b4-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
diff --git a/fdts/stm32mp157a-dk1.dts b/fdts/stm32mp157a-dk1.dts
index 4ea83f7cd..78681b0ba 100644
--- a/fdts/stm32mp157a-dk1.dts
+++ b/fdts/stm32mp157a-dk1.dts
@@ -29,9 +29,9 @@
        st,digbypass;
 };
 
-&i2c4 {
+&i2c2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&i2c4_pins_a>;
+       pinctrl-0 = <&i2c2_pins_a>;
        i2c-scl-rising-time-ns = <185>;
        i2c-scl-falling-time-ns = <20>;
        status = "okay";
@@ -162,9 +162,9 @@
        status = "okay";
 };
 
-&sdmmc1 {
+&sdmmc2 {
        pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc1_b4_pins_a>;
+       pinctrl-0 = <&sdmmc2_b4_pins_a>;
        broken-cd;
        st,neg-edge;
        bus-width = <4>;
diff --git a/fdts/stm32mp157c.dtsi b/fdts/stm32mp157c.dtsi
index 91b20fa4a..cafdd6bf7 100644
--- a/fdts/stm32mp157c.dtsi
+++ b/fdts/stm32mp157c.dtsi
@@ -312,6 +312,20 @@
                        status = "disabled";
                };
 
+
+                i2c2: i2c@40013000 {
+                        compatible = "st,stm32f7-i2c";
+                        reg = <0x40013000 0x400>;
+                        interrupt-names = "event", "error";
+                        interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&rcc I2C2_K>;
+                        resets = <&rcc I2C2_R>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        status = "disabled";
+                };
+
                i2c4: i2c@5c002000 {
                        compatible = "st,stm32f7-i2c";
                        reg = <0x5c002000 0x400>;
  1. Commit 7c864b896791947bd299bb0625c0386afe827ef0 in STā€™s tree is broken on the Seeed SoM, but the mainline version f564d439a957b96de24cc3c2e2bb5f2e8a052384 works? I had to replace them to get ATF to not immediately panic.
  2. Commit 606053d9b9e9080fb5269b1d05e8dd4390883a93 in STā€™s tree is also broken, making the I2C2 bus which the PMIC is on unusable and causing a panic. This commit isnā€™t mainlined so I donā€™t know whatā€™s going on here.

Edit: 2 is wrong. I was testing it wrong- the PMIC setting itself to secure will always break things for some reason. Iā€™ll need to test more device tree stuff.

Edit 2: Iā€™m not sure what to make of the PMIC security stuff. It works mainline but not out of tree.

I was directed to this: https://wiki.st.com/stm32mpu/wiki/PMIC_hardware_components

Apparently only I2C4 and I2C6 are supported for secure operation and as such arenā€™t supported by ST for this.

Yeah after about a week of trying to get this working, Iā€™m giving up. ATF doesnā€™t work on this board.

Okay past me, cool it a little. ATF does work given some device tree tweaks, but for some reason it doesnā€™t boot Seeedā€™s Linux. I spent a week trying to get mainline working with Ethernet but in the end the problem was that STā€™s ā€˜st,eth_clk_selā€™ is ā€˜st,eth-clk-selā€™ in mainline. I was pretty sure ATF was mucking something up.

Okay for anyone else thatā€™s going down this road, Iā€™ve put up the code Iā€™ve used to get it working:

ATF: https://git.lumina-sensum.com/LuminaSensum/arm-trusted-firmware/commits/WIP_v2.3-LS
Barebox: https://git.lumina-sensum.com/LuminaSensum/barebox/commits/WIP_next-LS
Linux: https://git.lumina-sensum.com/LuminaSensum/linux/commits/WIP_v5.8-LS

Thank you very much. Is it available on GitHub? Your private Git account is required and may not be accessible to regular users.

Oops, yeah it looks like itā€™s inaccessible. Iā€™ll upload it to GitHub tomorrow or sooner. :slight_smile:

Ok, thank you again.

No problem. Itā€™s a WIP, Iā€™m not sure how well power management is in ATF. I had to backport some ST stuff to get shutdown working, but Iā€™m not sure about suspend yet.

ATF: https://github.com/Jookia/arm-trusted-firmware/commits/WIP_v2.3-LS
Linux: https://github.com/Jookia/linux/commits/WIP_v5.8-LS

The commit to fix Ethernet (https://github.com/Jookia/linux/commit/6f589b1dfa37cb449584b5e827ac3117369a4446) should work in U-Boot/Barebox too.

Hello 166291,
I was struggling with the ATF long into the night when I stumbled upon this post. I had made the same changes as you but on the ST ATF repo and got the following.

NOTICE:  CPU: STM32MP157CAC Rev.B
NOTICE:  Model: STMicroelectronics STM32MP157C-DK2 Discovery Board
INFO:    Reset reason (0x15):
INFO:      Power-on Reset (rst_por)
INFO:    Using USB
INFO:      Instance 2
INFO:    Boot used partition fsbl1
NOTICE:  BL2: v2.0-r2.0(debug):v2.0-stm32mp-r2-dirty
INFO:    BL2: Doing platform setup
INFO:    PMIC version = 0x20
PANIC at PC : 0x2ffe6d03

Exception mode=0x00000016 at: 0x2ffda000

I figued I would give your repo a run and see if that works, but I end up with this

NOTICE:  CPU: STM32MP157CAC Rev.B
NOTICE:  Model: STMicroelectronics STM32MP157C-DK2 Discovery Board
INFO:    Reset reason (0x15):
INFO:      Power-on Reset (rst_por)
ERROR:   Boot interface not found
PANIC at PC : 0x2ffd91e1

I feel lost. Any ideas what I could be missing?

I am building with gcc-arm-8.3-2019.03-x86_64-arm-linux-gnueabihf and the string
make -C ${<your ATF repo cleaned with said branch checked out>} CROSS_COMPILE=${<as above>} PLAT=stm32mp1 LOG_LEVEL=40 DTB_FILE_NAME=stm32mp157c-dk2.dtb ARM_ARCH_MAJOR=7 ARCH=aarch32 AARCH32_SP=sp_min STM32MP_USB_PROGRAMMER=1 STM32MP_EMMC=1 STM32MP_SDMMC=1 all

I load the code with STM32CubeProgrammer/bin/STM32_Programmer_CLI -c port=usb1 -w flash.tsv

flash.tsv

#Opt Id Name Type IP Offset Binary
- 0x01 fsbl1-boot Binary none 0x0 tf-a-stm32mp157c-dk2.stm32
- 0x03 ssbl-boot Binary none 0x0 u-boot.stm32

Last. Great thanks for the info in your post!

Best Regards

Yeah those are the the errors Iā€™d get with STMā€™s repo. They have a bunch of code that would enable security features that reply on the STMPIC1 being on a different i2c bus adn seems to fail if thatā€™s not the case. Thatā€™s why I gave up and just backported some stuff to get normal ATF working.

Any idea why I am getting

running the ATF from your repo?

Best regards

Are you on commit 75090fd1ae6723b0b2c10b5973108cfcd260bc54 ? Youā€™re using dk2 as the device tree but Iā€™ve only edited dk1 maybe thatā€™s the issue?

Hello,

Thanks again your replay.

The dk2 DTS just ā€˜#include ā€œstm32mp157a-dk1.dtsā€ā€™ and changes the model name so I consider them the same in terms of the ATF. And yes, I use commit 75090fd.

I recall seeing something like this a long time before. Could be something silly as the tsv file missing something.

The ST ATF has a case for USB

#ifdef STM32MP_USB
    case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
        INFO("Using USB\n");
        break;
#endif

Where as the other ATF does not. It seems that I am not specifying the Boot device correctly.

Hi ekorre,

I talked to my co-developer and found out that we donā€™t actually use that branch, we use v2.2 with a set of patches similar. Iā€™ve uploaded them to the v2.2-LS branch on GitHub. I may have somehow broken the 2.3 branch.

Are you working over DFU? I donā€™t think mainline supports USB DFU, youā€™ll have to backport it. :frowning:

I am trying to boot over USB so that is exactly right. I tried to backport the support and while doing that I stumbled upon this

https://wiki.st.com/stm32mpu/wiki/PMIC_hardware_components#Support_in_Cortex-A7_Secure

It gives detailed instructions on how to move the PMIC from I2C4 to I2C2 for the ST ATF. Works great.

Again thanks!

1 Like

Could you share your changes as a patch? Have you tested it with STā€™s custom kernel?