Hello eveyone, this is a technical question.
Is the board design and/or BIOS up-to-date with the latest intel’s errata 030 about the CPU LPC degradation over time?
030 :
System May Experience Inability To Boot Or May Cease Operation Or
Nonfunctioning Of LPC, I2C and GPIO Circuitry
Problem
Under certain conditions LPC, I2C and GPIO circuitry may stop
functioning in the outer years of use.
Implication LPC circuitry that stops functioning may cause operation to cease
or inability to boot. I2C circuitry that stops functioning may
cause operation to cease. Intel has only observed this behavior in
simulation. Designs that implement the LPC interface at 1.8V signal
voltage are not affected by the LPC portion of this sighting.
Clockrun Protocol is not mandatory for GLK designs with LPC
circuitry operating at 1.8V. When the platform drives the GPIO pin
low, GPIO’s programmed with weak pull-up circuitry may fail to
maintain a value above VIH when not actively driven.
Workaround
It is possible for BIOS to contain a workaround for this erratum.