Hi chunchun,
it is all about vague and ambiguous choice of words. In your quote from the E5 datasheet:
… LoRa-E5-LF (Single-core STM32WLE5JC + SX126X) means in the module there is an STM32WLE5JC, and additionally an SX126X. This is misleading since we know that the STM32WLE5JC already contains an SX126x IP, so the “+SX126x” is false. A better statement would be (Single-core Cortex M4 + SX126x)
The distinction has important implications for firmware development. If the SX126x is in IP form as part of the STM32WLE5JC, to write/modify the firmware I rely exclusively on the STM32WLE5JC documentation. If instead there is an additional SX126x chip in the module, I must follow the Semtech documentation.
Same problem further up:
Based on the development of the multi-mode high-performance SX126X chip, the LoRa-E5 module supports…
By “chip” I understand a physical piece of silicon, which may be documented in any Semtech data sheets. Note, strictly speaking there is no such thing as a “SX126x chip”; this in itself is wrong.
I know, writing datasheets is not easy. I recommend more quality control.
BTW another vague and potentially misleading piece:
If you need to upgrade the built-in AT command
firmware, please use the two-wire interface (UART) to complete the programming based on the boot mode; and
customers can develop the software based on the internal MCU of the module to complete the program erasure
and programming through SWD.
Can you explain the above in clear, practical steps? Thank you!