Looking for a Zephyr expert for paid analysis / work

Payback time for all the help I got on this forum!

I try to document my cleanup of everything I’ve tried.

Removing this function in main() costs me 8uA:

static void qspi_flash_enter_dpd_and_park_pins(void)
{
/* Init QSPI long enough to talk to the chip */
nrfx_qspi_config_t cfg = NRFX_QSPI_DEFAULT_CONFIG(19, 17, 20, 21, 22, 23);
cfg.pins.sck_pin = 19;
cfg.pins.csn_pin = 17;
cfg.pins.io0_pin = 20;
cfg.pins.io1_pin = 21;
cfg.pins.io2_pin = 22;
cfg.pins.io3_pin = 23;

nrfx_qspi_init(&cfg, NULL, NULL);

/* Send Enter Deep Power-Down (0xB9) */
nrf_qspi_cinstr_conf_t cin = {
    .opcode   = 0xB9,
    .length   = NRF_QSPI_CINSTR_LEN_1B,
    .io2_level= true,
    .io3_level= true,
    .wipwait  = false,
    .wren     = false,
};
(void)nrfx_qspi_cinstr_xfer(&cin, NULL, NULL);

/* Done with QSPI */
nrfx_qspi_uninit();

/* Park pins to prevent leakage: CS high, others pulled down */
const struct device *gpio0 = DEVICE_DT_GET(DT_NODELABEL(gpio0));
gpio_pin_configure(gpio0, 17, GPIO_OUTPUT_HIGH);                 /* CS */
gpio_pin_configure(gpio0, 19, GPIO_INPUT | GPIO_PULL_DOWN);      /* SCK */
gpio_pin_configure(gpio0, 20, GPIO_INPUT | GPIO_PULL_DOWN);      /* IO0 */
gpio_pin_configure(gpio0, 21, GPIO_INPUT | GPIO_PULL_DOWN);      /* IO1 */
gpio_pin_configure(gpio0, 22, GPIO_INPUT | GPIO_PULL_DOWN);      /* IO2 */
gpio_pin_configure(gpio0, 23, GPIO_INPUT | GPIO_PULL_DOWN);      /* IO3 */

}

WIP

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