Longan Nano - PA14 IPU not working?


I have a project that is max’d out for gpio, so I’m reusing the JTAG pins as inputs. I’ve disabled JTAG with

gpio_pin_remap_config(GPIO_SWJ_DISABLE_REMAP, ENABLE);

and initialised the pins as inputs with internal pull-up resistors. Everything is working fine for PB3, PA13 and PA15, but PA14 is stuck low, as if the internal pull down resistor is enabled instead of the pull-up. PA14 is the the JTAG clock by default and is the only JTAG line that uses pull-down instead of pull-up (section 7.3.1 of the processor user manual). I’m wondering if the hardware for that pin is less configurable than for the standard GPIOs? Anyone else run into this? I figure I’ll do some testing to see if I can add an external pull up, and if that doesn’t work maybe swap it with another pin and use it as an output. Both options are a little bit messy, so if there’s a software fix that would be better!

Thanks for any thoughts,

I confirmed that I can ‘fix’ the problem with an external 4k7 pullup resistor. It looks like the internal pull-down resistor is around 45k or so based on the voltage at the pin. It’s an ugly solution but better than nothing.

According to some chinese blog, the doc is buggy and to release all 5 pins from JTAG, you need to actually write b100 and not b10 to SWJ_CFG:

AFIO_PCF0 = (AFIO_PCF0 & 0xF8FFFFFF) | 0x04000000;

Also, dont forget to enable the clock for the remapping subsystem:


source: (google translate of) https://blog.csdn.net/zoomdy/article/details/101386700

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Oh, thanks for that, I’ll give it a go! It would be great if that works as I forgot to add the external pull-up resistor to the first rev of the pcb and was going to have to patch them.

@orzel Thanks so much for that Thomas, I can confirm that the work-around you provided allows the internal pull-up to work as expected!

Great :wink:
It’s still bumpy, but risc-v in general and longan/gd32vf in particular are fascinating technology.