GPIO on A603 with Jetpack 6?

Products & Technology Single Board Computers
#1

Hi,

I’m using an Jetson Orin Nano on an A603 with JP6, and I’m getting nowhere with being able to access GPIOs.

Evidently with JP6, Nvidia have deprecated the sysfs driver for GPIOs, requiring the use of libgpiod instead. But it seems that for the A603, the necessary device trees are missing entirely so that libgpiod has no idea how to control GPIO pins. I can manually modify the GPIO control registers using busybox, but it seems like libgpiod has no information on how to control actual GPIO signals.

Is there a DTS overlay for A603 and JP6 that I can download? Are there some instructions for configuring the DTS for things like pin direction and drive strength?

Are there any examples of people successfully accessing GPIOs on the A603 with JP6? I’ve spent at least 8 hours now trying to figure this out, I’m completely overwhelmed, and I’m getting nowhere.

Please help!

References:

https://docs.nvidia.com/jetson/archives/r36.2/DeveloperGuide/HR/JetsonModuleAdaptationAndBringUp/JetsonOrinNxNanoSeries.html#generating-the-pinmux-dtsi-files

https://connecttech.com/resource-center/kdb379-gpio-pin-mapping-for-jetson-carriers/#1730386202814-eda17576-cfd1
https://developer.download.nvidia.com/assets/embedded/secure/jetson/agx_orin/Orin-TRM_DP10508002_v1.2p.pdf?ePm_v25niPuiH2ZvMGd4lgqHq4qjO2JbbCx-ftGizqevBwQjeL7gUx4dH1qXMVvcVaMvkjbInZS4NaKXZZE_JJwEnomD_fMIMMiwS3a0C8DDmt4H-V1kW7Hrm1mbR3valH8sdpnZjDE4WDG9jgeU7fXRR7qlETLY_2_DvPtCgGJq_7s=&t=eyJscyI6ImdzZW8iLCJsc2QiOiJodHRwczovL3d3dy5nb29nbGUuY29tLyJ9

#2

Extract and decompile the current device tree to check if GPIO nodes are properly defined for the A603 carrier board.

dtc -I dtb -O dts -o extracted.dts /boot/dtb/<board-dtb-file>.dtb
#3

Hi,

When I ran your command, I got loads of warnings, which doesn’t bode well. But I did get a dts file, and my wild guess about which sections matter are these:

        gpio@2200000 {
            compatible = "nvidia,tegra234-gpio";
            reg-names = "security\0gpio";
            reg = <0x00 0x2200000 0x00 0x10000 0x00 0x2210000 0x00 0x10000>;
            interrupts = <0x00 0x120 0x04 0x00 0x121 0x04 0x00 0x122 0x04 0x00 0x123 0x04 0x00 0x124 0x04 0x00 0x125 0x04 0x00 0x126 0x04 0x00 0x127 0x04 0x00 0x128 0x04 0x00 0x129 0x04 0x00 0x12a 0x04 0x00 0x12b 0x04 0x00 0x12c 0x04 0x00 0x12d 0x04 0x00 0x12e 0x04 0x00 0x12f 0x04 0x00 0x130 0x04 0x00 0x131 0x04 0x00 0x132 0x04 0x00 0x133 0x04 0x00 0x134 0x04 0x00 0x135 0x04 0x00 0x136 0x04 0x00 0x137 0x04 0x00 0x138 0x04 0x00 0x139 0x04 0x00 0x13a 0x04 0x00 0x13b 0x04 0x00 0x13c 0x04 0x00 0x13d 0x04 0x00 0x13e 0x04 0x00 0x13f 0x04 0x00 0x140 0x04 0x00 0x141 0x04 0x00 0x142 0x04 0x00 0x143 0x04 0x00 0x144 0x04 0x00 0x145 0x04 0x00 0x146 0x04 0x00 0x147 0x04 0x00 0x148 0x04 0x00 0x149 0x04 0x00 0x14a 0x04 0x00 0x14b 0x04 0x00 0x14c 0x04 0x00 0x14d 0x04 0x00 0x14e 0x04 0x00 0x14f 0x04>;
            #interrupt-cells = <0x02>;
            interrupt-controller;
            #gpio-cells = <0x02>;
            gpio-controller;
            gpio-ranges = <0x02 0x00 0x00 0xa4>;
            phandle = <0xe5>;
        };

        pinmux@2430000 {
            compatible = "nvidia,tegra234-pinmux";
            reg = <0x00 0x2430000 0x00 0x19100>;
            status = "okay";
            phandle = <0x02>;

            pex_rst_c4_in {
                phandle = <0x112>;

                pex_rst {
                    nvidia,pins = "pex_l4_rst_n_pl1";
                    nvidia,function = "rsvd1";
                    nvidia,pull = <0x00>;
                    nvidia,tristate = <0x01>;
                    nvidia,enable-input = <0x01>;
                    nvidia,lpdr = <0x00>;
                };
            };

            pex_rst_c5_in {
                phandle = <0x109>;

                pex_rst {
                    nvidia,pins = "pex_l5_rst_n_paf1";
                    nvidia,function = "rsvd1";
                    nvidia,pull = <0x00>;
                    nvidia,tristate = <0x01>;
                    nvidia,enable-input = <0x01>;
                    nvidia,lpdr = <0x00>;
                };
            };

            pex_rst_c6_in {
                phandle = <0x10a>;

                pex_rst {
                    nvidia,pins = "pex_l6_rst_n_paf3";
                    nvidia,function = "rsvd1";
                    nvidia,pull = <0x00>;
                    nvidia,tristate = <0x01>;
                    nvidia,enable-input = <0x01>;
                    nvidia,io-high-voltage = <0x01>;
                    nvidia,lpdr = <0x00>;
                };
            };

            pex_rst_c7_in {
                phandle = <0x10d>;

                pex_rst {
                    nvidia,pins = "pex_l7_rst_n_pag1";
                    nvidia,function = "rsvd1";
                    nvidia,pull = <0x00>;
                    nvidia,tristate = <0x01>;
                    nvidia,enable-input = <0x01>;
                    nvidia,io-high-voltage = <0x01>;
                    nvidia,lpdr = <0x00>;
                };
            };

            pex_rst_c10_in {
                phandle = <0x102>;

                pex_rst {
                    nvidia,pins = "pex_l10_rst_n_pag7";
                    nvidia,function = "rsvd1";
                    nvidia,pull = <0x00>;
                    nvidia,tristate = <0x01>;
                    nvidia,enable-input = <0x01>;
                    nvidia,io-high-voltage = <0x01>;
                    nvidia,lpdr = <0x00>;
                };
            };

            eqos_rx_disable {
                phandle = <0x10f>;

                eqos {
                    nvidia,pins = "eqos_rd0_pe6\0eqos_rd1_pe7\0eqos_rd2_pf0\0eqos_rd3_pf1\0eqos_rx_ctl_pf2";
                    nvidia,enable-input = <0x00>;
                };
            };

            eqos_rx_enable {
                phandle = <0x110>;

                eqos {
                    nvidia,pins = "eqos_rd0_pe6\0eqos_rd1_pe7\0eqos_rd2_pf0\0eqos_rd3_pf1\0eqos_rx_ctl_pf2";
                    nvidia,enable-input = <0x01>;
                };
            };
        };

I also found these in another spot:

        gpio@c2f0000 {
            compatible = "nvidia,tegra234-gpio-aon";
            reg-names = "security\0gpio";
            reg = <0x00 0xc2f0000 0x00 0x1000 0x00 0xc2f1000 0x00 0x1000>;
            interrupts = <0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3b 0x04>;
            #interrupt-cells = <0x02>;
            interrupt-controller;
            #gpio-cells = <0x02>;
            gpio-controller;
            gpio-ranges = <0xfa 0x00 0x00 0x20>;
            phandle = <0xf7>;

            GPIO06-high {
                gpio-hog;
                output-high;
                gpios = <0x13 0x00>;
                label = "gpio06_high";
                status = "okay";
            };
        };

        pinmux@c300000 {
            compatible = "nvidia,tegra234-pinmux-aon";
            reg = <0x00 0xc300000 0x00 0x4000>;
            phandle = <0xfa>;
        };

I really don’t know how to interpret this or relate anything here to actual pins.

Thanks.