What verlog compiler is being used for development, is it the software bundled with the
iCEman iCE65L04-L Evaluation Kit or the full blown iCEcube software?
I second this question. We need to know which is used by the firmware developers.
Have a look here: viewtopic.php?p=7240#p7240
I’ve updated it with the information I have. (I realize I can’t answer your question, per se. I’m trying to track down the version that comes with the evaluation kit to see if I get any farther that way.)
I have managed to compile the files to a bitstream (in SiliconBlue lingo, a bitmap) but it doesn’t exactly match the official one published here.
Thanks, I’d not seen the previous posts on the FPGA tools, I was just hoping that I could
avoid spending $2K on yet another verilog compiler.
I wonder if there is any hope trying to compile the design with Icarus Verilog (the 0.8 releases) and the tools that come with iceCube 2 but do not require a license (edifparser, sbtplacer, sbrouter). It seems a very thin chance, but it would give us a free (iverilog as in speech, iceCube 2 as in beer) toolchain for compiling designs for the FPGA.
It is very frustrating to have the FPGA just sitting there with the very limited seeedstudio bitfile that doesn’t even trigger properly, when it has the potential to do much much more.
Hey!
Looks like SiliconBlue was bought by Lattice, and now the development tools for Windows are available for free:
latticesemi.com/products/des … nloads.cfm
I haven’t tried it out yet but it looks promising.
Yes, and they send a license through the mail.
Tried applying for it… let’s see what happens.