All strapping pins have latches. At system reset, the latches sample the bit values of their
respective strapping pins and store them until the chip is powered down or shut down.
The states of latches cannot be changed in any other way. It makes the strapping pin
values available during the entire chip operation,
and the pins are freed up to be used as regular IO pins after reset.
Once you grasp this concept it all makes sense.
HTH
GL PJ
You can also consult the schematic to get yourself some reassurance
PJ 
