engineering sample FPGA files wanted

Some of us were lucky to receive some early Quad engineering samples. It seems like I have messed up mine trying out firmware versions. I have tried reloading 0106_APP.hex/1229_SYS.hex, 0115_APP.hex/0106_SYS.hex, 0118_APP.hex/0118_SYS.hex without success. The app runs but I only get a flashing, straight trace at the bottom of the trace field, Vdc and RMS values are constant, multiples of 20mV and depend on YPOS.

I wonder if I have to reload the FPGA code. I have tried the 0118_FPGA.bin which is the only file I could find, but it returns 0118_FPGA.NOT when I try to load it. Maybe this file is too new for my hardware?

Does anyone know where in the flash the FPGA.bin is stored, so that can try to read out what I have and verify it? Isn’t it copied from flash to FPGA on power-on?

Some instructions mentions an FPGA.ADR file that must be loaded before the .BIN file. However there is no .ADR file in the one release I found with a .BIN file.

Another note, I know some engineering samples would display “Enhanced Hardware Version” on boot but my displays “Basic Hardware Version”. Unfortunately I don’t remember if mine displayed something different before. I should have taken a screenshot before doing anything with it…

have you checked this location?

If you can’t find it, I can look as I may be having a copy on my disk.

On version 2.6 it is stored starting at 0x0802C000 and is 68088 bytes long.

If you don’t have anything handy, you can use this to take flash dumps (installs to slot 3):

Thanks for the link. The only FPGA files I found there were a 2.22 binary and a copy of the 2.5 code from

I think I will need an older version. The engineering samples were hardware version 2.2 (older and possibly different than the beta models).

Thanks, I just found the address ranges on the wiki now

At one point I had to do a read unprotect to reload APP/SYS over the serial line, so the FPGA binary must have been cleared back then. I have only tried to install the 0118_FPGA.bin after that, and I am not sure if that was ever successful. I will check if there is any data at 0x0802C000 and then try reloading that section from your full flash dump which you posted once.

Thanks for your help,

Quick update: I verified that the FPGA code inside jpa’s full flash dump was the same as in the FPGA_V25.BIN. Since I had the CFG_FPGA.ADR file coming with it I could quickly install it the “normal way”. Now my DSO booted with “Enhance Hardware Version”! But it did not work correctly, now the scan did not seem to run. There was no A or B trace, and C and D seemed flat zero (although that’s maybe normal since their are digital).

Once I realized that there was not much magic to the .ADR file, I used it with the 0118_FPGA.bin file. And now it loaded successfully, and \o/ :smiley: my scope is running again! My CH(A) seems dead, but CH(B) works.

I also tried the V222 but similar to V25 it does not work. Maybe something older than 0118 would make my CH(A) work.

EDIT: My CH(A) does work. It was just not picking up 50 Hz from my finger like CH(B) did.
EDIT2: What made this particularly confusing is that the generator output is labeled “CH A” and the channel A input “Wave Out” on my device…