Yet another try:
http://kapsi.fi/~jpa/stuff/other/LOGICAPP.HEX
This time I have a pretty strong theory about what went wrong. The STM32F103 processor revisions before ‘Y’ have a bug, where accessing the external memory bus from 2 places at once may crash the processor. Because the LCD and the FPGA are on the same bus, I did exactly this: writing to LCD from DMA2 and reading FPGA using DMA1. I now moved the LCD code to use DMA1 also, which should fix the bug at the cost of slowing down screen update a bit.
Edit: I made a small additional change to the file just now.