DSO NANO - how we users can impact next hardware design !!!

Hi Slimfish and ESP,

Nice detailed post! My comments:

The DSONANO is not a laboratory instrument with high bandwidth. If the sampling rate is 1 Msps then the max usable input is <500kHz. The internal ADC in the ST uC (or any ADC) generally cannot resolve the number of bits claimed. The ENOB with noise factored in the calculations, and by empirical measurement, is lower by 2 or more bits (i.e. 14 bit -> 12 bit, 16 bit ->14 bit, etc.) of reliable measurement. This impacts not only the S/N but the resolution out of a maximum 3 volts. The resolution determines the offset which can cause an error in the signal measured. Essentially, the offset numbers you calculated are much, much smaller the ADC can resolve.
Note that most commercial scopes (Tektronix, Agilent, etc.) costing less than $3000 have only 8 bits of amplitude resolution (i.e. “Y” or “Vertical” resolution).

As for the GBW of the amplifiers, note that they all vary with the gain of the PGAs. The PGA113 can have a gain of 50 and still exceed the DSANANO bandwidth. I guess if you want to measure micro volts, than this will not be sufficient. I can’t see using the DSONANO for use with very small signals because of the total lack of shielding, the input connector, and the probe arrangement. The DSONANO can be useful from a few HZ to perhaps 499 kHz with input signals greater than 10 mV. With 10 mV input signals the accuracy will not be very useful, but signal shape can be analyzed. To measure signals with reasonable accuracy, the input should be greater than 50-100 mV.

As for offset, refer to U5A in the DSONANO. The sole function of this circuit is to DC level shift the signal. The input to this circuit is via R15. The uC outputs a PWM here, which is integrated by R15, C12 and R16, C13 into a variable (depending on PWM) DC voltage to pin 3 of U5A. U5A functions as a buffer changing the DC level of the input signal from U5B before it goes to the uC ADC. If you replace U5 with a PGA, then the PGA has to have a variable offset input, which is pin 4 Vref on the PGA113. This is necessary even if the input is DC coupled to compensate for any offset and is probably also used for vertical positioning of the waveform on the LCD display.

Perhaps I was not clear about AC / DC input coupling. I suggest ONLY AC input coupling for the reasons I mentioned. DC coupling for the full range of inputs would not easily fit within the DSONANO (the complexity of the attenuator, requirement for +/- supply, level shift to match the 3 V ADC, etc.). A simple1nF capacitor in series with the 10 or 100 kOhm input resistor would work down to a few HZ.

The resistor I mentioned in the input is not to raise the input impedance, but to offer current limiting for the protection diodes in the PGA113. This is a very simple and inexpensive input protection circuit in case the probe is connected to a high voltage. The input impedance of the PGA113 is 10 GOhm (10,000 MOhm) with 5 pF capacitance. Changing the gain does not change this. Since most oscilloscope probes expect to connect to 1 MOhm , 5pF load, a 900 kOhm resistor (assuming a 100 kOhm input series resistor) is necessary from the input pins (2, 3) to ground. This is how the input impedance is defined. Note that there will be some small pF capacitors needed here to make sure the impedance is flat across the usable bandwidth. Most of the other PGAs have much, much lower input impedance and much, much higher capacitance.

This was in response to a few posters who asked about the possibility. You are correct that this would not make the DSONANO a 500 MHz Logic Analyzer, but limited to perhaps 100 to 300 kBs. I think that this would not be very useful because of the small screen and low resolution the DSONANO. But if there are people interested in this, it is a possibility. There are USB 8+ channel Logic Analyzer probes with similar performance for about the same price already, and they show the multiple waveforms on the large PC / Laptop / Netbook screen.

Perhaps what you need is an external battery pack. Model RC airplanes and helicopters have readily available LiPo batteries about the same size as the DSONANO which could operate it for 20-40 hours continuously. Of course this would more than double the thickness and weight of the DSONANO, cost $20-$40 and require a separate charger $20-$20.

SCHEMATIC from Slimfish of 6-22-2010

A few changes suggested:
• AC Couple both channels.
• Delete the 1 MOhm from IC pin 2. This also allows using a 1 nF or 0.1 nF COG (do not use X7R, X5R, Y5U, etc.) on pin2.
• R1, R2, C7 need to be 805 or 1206 for >200V capability. C7 and C? (47pF to GND) need to be COG types
• Delete C8, the ADC has enough capacitance. If a low pass filter is desired here, increase the value of the 100 Ohm resistor and use the input capacitance of the ADC to calculate R.
• Delete the entire Vref section (OpAmp and related parts). Connect pin 4 of the PGA113 to the same place as U5A pin 3 (R13 - C16 junction) in the current DSONANO.

I can help sourcing any parts. TI lists inventory here: focus.ti.com/docs/prod/folders/print/pga113.html

As I write this, The PGA113 is in stock at:
Avnet= 250 , Digi-Key= 98, Newark=139 , Farnell Asia= 519, Farnell Europe= 499 and Mouser= 86

The PGA 112 is almost the same part, but with Binary gain steps. Since this is for a DSO, I thought the simple 1-2-5 gain steps of the PGA113 would be more appropriate. The same vendors listed above have PGA112 in stock at larger quantities. I suggest you contact TI Asia. They can get you free samples and help with buying for production.


Hi shazam,

sorry if i bothered you with the circuit explanation of my last message. My intention was not to teach you but to show other people how the proposed circuit works. i’d like to emphasize that this series of posts are not because of my ego. I only want to contribute to enhance a product which can be very useful in my day work (when enhanced) and for many other people (like electronic enthusiasts).

The last circuit i posted had another error. This time was due to the drawing hurry (was done in 15 min). R5 and R? (i forgot to name it) are not grounded but connected to VREF. This is important, otherwise input can not cope with negative values.

Suppose the ADC can resolve 10 bit maximum with a VREF of 3V. That’s 2.9 mV/LSB. If offsets are in the range of 100uV, and we use a gain of 100 for the 10 mV/div, then we have a 10 mV offset which can be resolved by the ADC.

They cost thousands of bucks not only because the DC/AC resolution, but because of the sampling speed. And of course, for the functions they offer.

Both presented circuits cope with AC and DC coupling for the full range of inputs. And i think they are not complicated at all (even easier to adjust). And as showed, you need no split(±) supplies, otherwise, the PGA113 would not fit the bill (5.5V max).

If you get a 100kOhm resistor and use a 900kOhm in order to have a 1Mohm input then you have a resistive divider with a gain of 9/10. That’s fine when you have a signal with an amplitude smaller than 10/9 of VCC, which is not the case of DSO Nano, capable of -+40V with a x1 probe.

Again, in order to have a ±40V input with a x1 probe it’s necessary to atenuate the signal first. If you connect a x10 probe to the input, then signals will be very small and they have to be amplified (every mV is important).

There is no need to have a variable offset input when you can select between AC or DC coupling. The original scope doesn’t have a real AC coupling and the offset “simulates” and AC coupling by adjusting with the PWM the DC component. The PGA113 amplifies the signal in relation with VREF making the AC “simulation” a challenge programming effort in the case of this PGA.

You’re right, for two channel, up to 300 ksps are possible. But samples are not taken at the same time, so the aliasing probability is very high.

Thank you but no. What i need is a self contained oscilloscope for field use. And it’s not complicated to have an oscilloscope which enter low power mode if battery gets depleted (PGA113 has a software shutdown mode).

SCHEMATIC from Slimfish of 6-22-2010

A few changes suggested:
• AC Couple both channels.
• Delete the 1 MOhm from IC pin 2. This also allows using a 1 nF or 0.1 nF COG (do not use X7R, X5R, Y5U, etc.) on pin2. -> You’re right with the previous schematic. But this resistor is not connected to GND (see new schematic) and thus is needed anyway.
• R1, R2, C7 need to be 805 or 1206 for >200V capability. C7 and C? (647pF to GND) need to be COG types
• Delete C8, the ADC has enough capacitance. If a low pass filter is desired here, increase the value of the 100 Ohm resistor and use the input capacitance of the ADC to calculate R. -> The ADC input capacitance is about 5 pF. It’s very dangerous to count on such small (and variable) values to conform a low pass filter. But as showed on current DSO Nano it works…
• Delete the entire Vref section (OpAmp and related parts). Connect pin 4 of the PGA113 to the same place as U5A pin 3 (R13 - C16 junction) in the current DSONANO. -> No, you cant. VREF is a low impedance one (3.25 kOhm -see datasheet-) and hence the PWM filter will not function as intended.


Re: r2 schematic.

The problem with your r2 schematic is that the probe tip is now floating above Gnd by the value of Vref. This can influence whatever circuit you are measuring.

I think that is a REALLY bad idea.

So: I don’t see any way to have high input impedance without having a bipolar power supply for the input amplifier.


Hi dwayne,

every circuit you can design has an influence in the circuit under test. That’s why input impedance need to be constant.

The probe tip is NOT referenced to VREF, only the input impedance is. The GND of the tip is the same as the USB. So i don’t think it’s a REALLY bad idea. If you take a look in the PGA112 datasheet (pg. 36) you could see that this is an option used in many circuits. I didn’t reinvent the wheel again.

The circuit i proposed it’s a compromise between cost, simplicity, functionality and size. Of course it has it’s drawbacks. The main one is a DC offset in the circuit under test when measuring high impedance circuits (>100K). But if you tie the resistance to GND you will also influence the circuit towards GND (also a DC offset).

By the way, i built RV2 schematic & i doing some testing over it (frequency range, gain(f), offsets, etc). I’ll report as soon as i can.


Hi DwayneR and Slimfish,

DwayneR is correct. That is exactly why I suggested AC only, capacitive coupled inputs. To do this input circuit as a DC coupled, variable gain amplifier would cost a lot in terms of complexity, space, and money.

Regarding the input sensitivity mentioned earlier by Slimfish. The concept is to attenuate the input to accommodate the maximum P-P voltage you want to display on the scope. If you use a 10:1 probe, 30 V P-P becomes 3 V P-P, which is within the range of the ADC. With the probe switched to 1:1 the max input is 3 V P-P. By putting a 10:1 resistive divider on the input of the PGA113, these become 300V with a 10:1 probe and 30V with a 1:1 probe. If the maximum gain of the PGA113 is limited to 40 dB (gain of 100), then with a 1:1 probe the minimum input range is 300 mV P-P, which would be 37.5 mV per division (8 vertical divisions). This could be displayed as 30 mV / per division (with the extra 2 divisions not displayed, but available to see with Vertical offset).

By using a 3:1 attenuator in the PGA113 input, the input range would be:

10 V P-P/ division (80 V P-P for full display height) with a 10:1 Probe and
10 mV P-P/ division with a 1:1 Probe and max PGA113 gain of 100.

At the gain of 100, the PGA113 frequency response would be limited to about 300 kHz. At all other gains the PGA113 would exceed the Nyquist limit (500 kHz) of the ADC in the microcontroller.

If higher input voltage is desired, a 100:1 probe would allow a maximum 1kV input. Another possibility is to reduce the max Gain of the PGA113 to 10, reduce the attenuator and get 1 mV/ division input. I suspect that this would be useless because it would be very noisy.

Note that this design concept is based on using the protection diodes inside the PGA113 and requires enough series input resistance to limit the current to what the diodes can handle continuously at the maximum anticipated input voltage.

I think for this type of product, the 10V – 10 mV per division (100V Max input) input range using a switchable 1:1 – 10:1 Probe should meet most user’s needs.


Hi Shazam & DwaineR,

below is the schematic of a worst case scenario for DC offsets. V1, R1, R2 & R3 conforms a resistive divider. R4 & V2 model the RV2 DSO input (in the figure V2 is set to 0 -> connected to GND).

Let’s assume that DSO is not USB connected (otherwise R3 will be probably shortcircuited).

First case -> No DSO attached (ideal value)
OSC_IN = 900 mV
OSC_GND = 100 mV
OSC_IN - OSC_OUT = 800 mV

Second case -> R4 tied to OSC_GND (V2 = 0)
OSC_IN = 844 mV
OSC_GND = 155 mV
OSC_IN - OSC_OUT = 689 mV

Third case -> R4 tied to OSC_GND + Offset (V2 = 1.5V)
OSC_IN = 948 mV
OSC_GND = 51 mV
OSC_IN - OSC_OUT = 896 mV

Fourth case -> R4 tied to OSC_GND + Offset (V2 = -1.5). Equivalent to reverse connections in DSO
OSC_IN = 741 mV
OSC_GND = 258 mV
OSC_IN - OSC_OUT = 482 mV

Two conclusions are clear to me:
-every circuit you can design modifies circuit under test
-if VREF is non zero in the RV2 circuit, there is an offset which depends of the circuit under test. In the case presented was 200 mV depending of the form of measurement. If resistors were smaller (say 100K) offset accounts for a small 20 mV which is perfectly reasonable. But even if VREF is zero, there is some error (in this case the orientation of the DSO has no importance)

BUT (and that’s a big one):
-Are you usually work with MOhm circuits with a 1MOhm input? -> This is absolutely crazy IMHO
-Is it better to have a variable input impedance to work with (each scale a different measurement)?

As mentioned before, the circuit has it’s drawbacks.

Discrete variable input gain can be simply and easily done with solid state relays (like ASSR-1218 - 0.8€ @ 100 - mouser). The problem associated to them is size. But maybe is an option to consider. If VREF has to be 0, then bipolar power supplies are needed and the first circuit i posted can be used with minor modifications.

Side note: i think the purpose of redesigning a stage is to enhance it. Original DSO has DC coupling and 80 Vpp (selected to fit display range) for a x1 probe. Obviously you can modify some of the design constraints but i think you can’t redefine them all.


Edit: i forgot the schematic!!!

Hi all,

finally i got some time to do some test to the board i’ve built. The final schematic has been changed slightly in order to include a trimmer to ease the probe compensation. The designed PCB was designed with the time as the main constraint. So don’t expect a PCB design artwork here. A photo and schematic are included below.

In order to test the board, i used a Bus pirate (SPI commands), a multimeter, an oscilloscope and a spectrum analizer. The spectrum analyzer has an input impedance of 50 Ohm, so i also used a buffer between the PGA112 and the spectrum analizer.

Consumption (PGA + LMV321)
-Active: 1.4 mA
-IDLE: 0.5 mA

DC behaviour (DC measurements)
More or less as in the previous post. Expect a 5-10% error with 1% resistors and a usual circuit (R < 100K) under test.

AC behaviour
Tested first the compensation adjust with the trigger. Source was a square signal of 0.1 - 10 Vpp. It works, peaking is completely eliminated across tested frequencies (10 kHz - 500 kHz) and voltages. The x10 probe was not tested.
The frequency behaviour was observed for the 100 kHz - 1 MHz range. I would like to test with lower frequencies, but unfortunately, the sweep generator started @ 100 kHz.

When amplification was small (x1 - x32) the amplification gain was stable and the curve had 1 dB between peaks which translates into a 10% error for the full range. For the useable range of 100 - 200 kHz, the curve amplitude was < 0.3 dB which is approx. 4% of gain error.

For the higher ranges of amplification (x64 - x128) the amplifier was low pass filtering (approx. 3 dB @ 500 kHz).

I would like to post all the measurements in detail, but i don’t have the time to do the proper documentation. The circuit works (although it has to be tested with the x10 probe) and the results are very promising. Obviously, i would like to make a comparison between the actual DSO stage and the proposed one, but time is a scare resource these days, so i live that task up to Seeed or any of you with the proper equipment.

Needless to say, all the schematics and PCBs are with no license of any kind. Feel free to ask for the PCB & SCH file (protel) if you feel the need to.

P.S. All dB values are refering to a voltage signal, not to it’s power. Amplitudes are calculated as follows dB = 20 log10 (v).


Hey guys -

It looks like Seeed has just posted a new version of the nano. Can someone do a full teardown and let us know how the circuitry has changed?

In particular, I’m curious because they note that the firmware is “mostly compatible” – what the heck? :slight_smile:


Howdy RoboKaren,

I just heard about this a week ago. The web site Depot has most of the details that I know of. If you want a wild guess, I think the signal output may be more capable and flexible. I was mostly concentraing on the hardware. It is a new PCB, but I expect mostly the same parts and circuitry. We’ll just have to wait and see!


Looks like they’ve posted a new schematic (or at least the v2.3) on Google code. It uses LTC4054 and FDFMA2P853 for charge controlling.


Hi RoboKaren,

Changes in the DSO Nano 2.3

Seeedstudio has been nice enough to send me a prototype of the new DSO Nano.
It has DSO201 Oscilloscope Lib v2.22 and DSO201 Oscilloscope App v2.4 firmware loaded.
This may change, so my comments below apply to what I have in hand.

The 2.3 has a metal case, and is about 20% thicker and “taller”, but 20% “narrower” than the original. The power switch is now a metalized knob on the lower right side of the case; there are 5 navigation buttons arranged vertically on front to the right of the color LCD display, and two buttons on the top right side. The input connector is on the upper left side and there is now a connector on the bottom left side for the test signal out put. A mini USB connector is on the left side between these two. The micro SD slot is on the bottom.

The DSO Nano is now strong and stiff, significantly more rugged than the original. The power switch is easier to operate. The navigation buttons are part of the front panel, instead of separate buttons. I find them easier to use than the previous version which had them in a square pattern. Neither version is particularly dust or moisture proof, so if the scope is used in a dirty or wet environment, I would put it in a clear plastic zip bag.

The differences in the circuits are mostly to the power supplies, with some improvements to other circuits.

There is now a regulated battery charger (U1), and switching between battery and USB power (U10). This will give the battery a long life and will not overcharge it. It also allows using the DSO Nano on the USB power while charging the battery. The charge current is limited to 300ma. This means that a discharged 500mah battery should recharge from the USB port in less than 2 hours.

For the +/- 5 V supply there are two new ICs (U7, U8) replacing the old (U7). These are switched capacitor supplies which actually double the input voltage (from the Battery or USB), so the voltage can actually be higher than the “5V” on the schematic.

The calibration signal output and the serial port (CN5, internal) use a new IC (U9) as a buffer. This is operating from the Battery or USB Voltage, so the test signal’s amplitude will be higher when using the USB for power (close to 5V P-P) and lower when using battery power (3.7V P-P). This applies to the serial TX output as well.

The Attenuator section (input gain) has some variable capacitors added to allow more accurate adjustment of compensation for stray capacitance and tolerances (i.e. when looking at a square wave the tops can be made flat).

In addition to the JTAG connection (CN7 internal), there is now an ISP (In-circuit Serial Programming) connector (CN4 internal). This can make reprogramming the Processor much easier.

Everything is now on one PCB (the original DSO Nano had 2 PCBs joined by a connector).

I don’t know the details of what changed in the code, but can tell you that it now obviously can support ISP (I don’t know if has been implemented).

Most exciting is a much better display of changing signals such as audio. The waveform display is now light blue; instead of the green of the previous DSO Nano There is also a new function: Fit, in the upper left window of the menu where you select the sweep types.

What is the “Fit” Function? Automatic Settings! When Fit is selected, both the input sensitivity (V/Div) and the sweep (us&ms / Div) automatically adjust to “fit” the signal on the screen. You can manually adjust these settings, but after a short time the “Fit” will readjust them again. This works well, with a good tradeoff in timing between changing the settings to how fast and long the signal is not optimally sized. There is enough time for some peaks without constantly switching between settings.

I will be doing some more testing and evaluation shortly and post my findings here.


What is the manufacturer of the old enclosure? I broke the enclosure of my DSO Nano and I think I need a new one.

Regards :sunglasses:

Hi blue icon,

You can visit the seeedstudio.com/depot/contact_us.html and contact with Tech. Support. :slight_smile:

How large can the capture files be? What format are they in?

Has anyone modified the firmware to spit out the samples to something like the Sump Pump?

HI: All

My thoughts are screen, back ground default flash;
eg. Tek. blue,black grid,white trace or Green combo
eg. Spec. Analyzer. orange,black grid,white trace :smiley:

Thanx Rats


How can we access the hardware design files for the DSO Nano Quad?

In order to help in this area its great to have access to the hardware design files,
don’t you think?



My DSO Nano v2 got a short circuit in the probe. It almost ruined the circuit I tested. I found that the 3.5mm probe connector inside the unit was flawed, so I desoldered it and replaced it with two wires and an external connector. In the process the battery also short circuited a couple of times because it was poorly soldered. Then when everything was working I had a really hard time getting the cover back on because it was so tight (not because of my modifications).

For the next version I recommend the following:
-more reliable probe connectors
-better soldering/solder layout of the battery
-larger screws for the cover and PCB

Blanco :nerd:

imho, design must have resistor in serial among U9 chip pin Y3 and output jack CN3, else it is easy to overload Y3, to limit output current according to max current ratings of the chip. resistor about 100-150 omhs.
anyway i m advising to do this mod to current users.

:wink: I saw the DSO demonstration in my arduino course. It’s very usefull to work. the DSO is pratical and good to work fine to automation projects. :smiley: