DSO NANO - how we users can impact next hardware design !!!

Hi dwayne,

every circuit you can design has an influence in the circuit under test. That’s why input impedance need to be constant.

The probe tip is NOT referenced to VREF, only the input impedance is. The GND of the tip is the same as the USB. So i don’t think it’s a REALLY bad idea. If you take a look in the PGA112 datasheet (pg. 36) you could see that this is an option used in many circuits. I didn’t reinvent the wheel again.

The circuit i proposed it’s a compromise between cost, simplicity, functionality and size. Of course it has it’s drawbacks. The main one is a DC offset in the circuit under test when measuring high impedance circuits (>100K). But if you tie the resistance to GND you will also influence the circuit towards GND (also a DC offset).

By the way, i built RV2 schematic & i doing some testing over it (frequency range, gain(f), offsets, etc). I’ll report as soon as i can.

Slimfish