DSO firmware version 3.52

[lygra]

@BenF

This is to be expected as 50ms/Div (2ms between samples) is inappropriate for a 1kHz input signal (1ms between cycles).

I think I understand your response. Just to paraphrase, are you saying that when the period of the input signal is less than the period of that sweep time, then a full wave isn’t seen, thus only the DC portion seen at that trigger time is displayed?

@BenF

I think brandonb is concerned with refresh time. At 20ms/Div we need 20ms * 4098 / 25 for each capture cycle and this adds up to 3.28s. An alternative might be to trade sample depth for refresh time … The proposed change would apply as a user option to T/Div’s in the 1ms to 50ms range.

That sounds stellar. Are you considering a percentage capture buffer reduction or a binary capture buffer reduction count as user option?

@brandonb

… injector pulse width

Just for general information, the typical injector on time at idle is in the neighborhood of 1.5ms; so maybe a T/Div a little faster than 1ms could be included.