I have not yet tested the digital inputs (probably by lack of digital probes )
But I have 2 comments:
Looking at the schematics I am a bit surprised by the values found on the input circuit.
The 11K resistors combined with the capacitance of the ESD protection diode (which is 110pF) makes a large lowpass filter. It is a pity as there are ESD diode that have very low pF capacitance at very low price.
This will surely lower digital inputs performance.
As far as I understand it, the inputs of the FPGA are configured in 2,5V input. The ESD protection diodes clamp voltage to 5V (7.3V max during transient). Don’t you think the inputs will be stressed if used on 5V logic (well perhaps not as the current is limited by the resistor)?
On the Quad’s specifications, the voltage level for the digital inputs was not specified. It could be good to specify it before people burn their Quads.