Can the current COUNT value actually be read from TCC0-2 timer counters?

I’ll begin by answering my own prior question below, in hopes it may be helpful to others:

To read the TCC count value, the module must apparently be first issued a command to transfer the current count to a readable count register:

TC->CTRLBSET.bit.CMD = TCC_CTRLBSET_CMD_READSYNC_Val;

while (TC->SYNCBUSY.reg & TCC_SYNCBUSY_COUNT); // wait for sync

prior to attempting to read the count value via:

whatever = TC->COUNT.reg

===== My Prior Question ====

As although microchip’s documentation seems to indicates it can, either running or halted, the only value I receive back from the following code after the TCC1 is known to be initialized and running a periodic interrupt continuously blinking an LED, is 0 (zero); as if the current count register can’t actually be read?

Do any have any idea why? (is the addresses/offsets in their header files for the count register wrong?; if so what about CC0, which can be apparently successfully written but not read?)

Tcc* TC = (Tcc*)TCC1;

printf(“%d\n”,TC->COUNT.reg);

Or using Arduino code (both presuming TCC1 has been initialized and running)

Tcc* TC = (Tcc*)TCC1;
Serial.println(TC->COUNT.reg);

please note:

Serial.print("TC: ");
Serial.println((unsigned)&TC->COUNT.reg, HEX);
yields:
TC: 42002434
which seems correct, assuming the base for TCC1 is 0x42002400

Or anything else similar, shows the value being returned upon accessing the TCC count register as being 0 (zero), although it’s obviously not as the counter is continuously running, and continuously generating an interrupt upon the count matching the value written into the CC0 match register, which also returns only a zero, upon being read, although the header indicates it a R/W register?

========

or From: tcc.h

/*

  • \brief Component description for TCC
  • Copyright © 2015 Atmel Corporation. All rights reserved.
    */

#ifndef SAMD21_TCC_COMPONENT
#define SAMD21_TCC_COMPONENT

/* -------- TCC_COUNT : (TCC Offset: 0x34) (R/W 32) Count -------- /
#if !(defined(ASSEMBLY) || defined(IAR_SYSTEMS_ASM))
typedef union {

struct {
uint32_t COUNT:24; /
!< bit: 0…23 Counter Value /
uint32_t :8; /
!< bit: 24…31 Reserved /
} bit; /
!< Structure used for bit access /
uint32_t reg; /
!< Type used for register access */
} TCC_COUNT_Type;

typedef struct {

__IO TCC_COUNT_Type COUNT; /**< \brief Offset: 0x34 (R/W 32) Count */

} Tcc;

=======

Don’t quite understand your question? What features are you trying to implement?

I’m implementing/experimenting-with a simple timer-interrupt-driven multi-threaded run-to-completion scheduler, to simplify timing driven I/O tasks which would otherwise require the use of delay(); and thereby enable multiple independent overlapping sequence of events to be scheduled forward in time, with an effective useful minimum resolution of about 5 usec (~ 100KHz).

The use of delay(), typically throws away all the compute cycles which could otherwise have been spent on useful work while marking time in a soft loop, and effectively restricts timing sensitive programming to a single thread of execution.

There are multiple task/thread scheduler implementations available, but I could find none with the effective useful timing resolution, nor simplicity of use, I’d prefer.