2-Channel CAN BUS FD Shield for Raspberry Pi work on Jeton NX?

Hi,

I have verified it on Jetson Nano Devkit and it worked fine to comunicate with other CAN devices.
I migerated it to Jetson NX Devkit, it can’t detect any other CAN devices and the USB-CAN analyzer can’t detect "2-Channel CAN-BUS(FD) Shield ".

Source code: git clone https://github.com/Seeed-Studio/seeed-linux-dtoverlays

tw@tw-nx:~$ ifconfig -a
can0: flags=128<NOARP>  mtu 16
        unspec 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00  txqueuelen 10  (UNSPEC)
        RX packets 0  bytes 0 (0.0 B)
        RX errors 0  dropped 0  overruns 0  frame 0
        TX packets 0  bytes 0 (0.0 B)
        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0
        device interrupt 127  

can1: flags=128<NOARP>  mtu 16
        unspec 00-00-00-00-00-00-00-00-00-00-00-00-00-00-00-00  txqueuelen 10  (UNSPEC)
        RX packets 0  bytes 0 (0.0 B)
        RX errors 0  dropped 0  overruns 0  frame 0
        TX packets 0  bytes 0 (0.0 B)
        TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0
        device interrupt 129  

sudo ip link set can0 up type can bitrate 1000000   dbitrate 8000000 restart-ms 1000 berr-reporting on fd on
sudo ip link set can1 up type can bitrate 1000000   dbitrate 8000000 restart-ms 1000 berr-reporting on fd on

sudo ifconfig can0 txqueuelen 65536
sudo ifconfig can1 txqueuelen 65536

The hardware is wired to can0 and can1 interface.
0_L <===> 1_L
0_H <===> 1_H

Open two terminal windows and enter the following commands in the Windows to test can fd protocol.

#send data
cangen can0 -mv 
#dump data
candump can1 

dmesg errors shows below:


[ 12 21 15:13:02 2020] IPv6: ADDRCONF(NETDEV_CHANGE): can0: link becomes ready
[ 12 21 15:13:03 2020] gpio tegra-gpio wake56 for gpio=195(Y:3)
[ 12 21 15:13:03 2020] IPv6: ADDRCONF(NETDEV_CHANGE): can1: link becomes ready


[ 12 21 15:13:09 2020] can: controller area network core (rev 20120528 abi 9)
[ 12 21 15:13:09 2020] NET: Registered protocol family 29
[ 12 21 15:13:09 2020] can: raw protocol (rev 20120528)
[ 12 21 15:13:23 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:13:23 2020] nvgpu: 17000000.gv11b             railgate_enable_store:297  [INFO]  railgate is disabled.
[ 12 21 15:13:24 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:13:24 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:13:24 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:13:24 2020] IPv6: ADDRCONF(NETDEV_CHANGE): can1: link becomes ready
[ 12 21 15:14:28 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:14:28 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:14:28 2020] NOHZ: local_softirq_pending 08
[ 12 21 15:14:28 2020] mcp25xxfd spi0.0 can0: CRC read error at address 0x001c (length=4, data=00 00 00 00, CRC=0x0000).
[ 12 21 15:14:28 2020] mcp25xxfd spi0.0 can0: regmap_bulk_read MCP25XXFD_REG_INT error
[ 12 21 15:14:28 2020] mcp25xxfd spi0.0 can0: IRQ handler returned -74 (intf=0x00000000).
[ 12 21 15:14:28 2020] mcp25xxfd spi0.0 can0: -------------------- register dump --------------------
[ 12 21 15:14:28 2020] OSC: osc(0x000)=0x00000460
[ 12 21 15:14:28 2020]          SCLKRDY    		Synchronized SCLKDIV
[ 12 21 15:14:28 2020]           OSCRDY   x		Clock Ready
[ 12 21 15:14:28 2020]           PLLRDY    		PLL Ready
[ 12 21 15:14:28 2020]          CLKODIV =  3		Clock Output Divisor
[ 12 21 15:14:28 2020]          SCLKDIV    		System Clock Divisor
[ 12 21 15:14:28 2020]            LPMEN    		Low Power Mode (LPM) Enable (MCP2518FD only)
[ 12 21 15:14:28 2020]           OSCDIS    		Clock (Oscillator) Disable
[ 12 21 15:14:28 2020]            PLLEN    		PLL Enable

[ 12 21 15:14:28 2020] CON: con(0x000)=0x04980760
[ 12 21 15:14:28 2020]            TXBWS = 0x00		Transmit Bandwidth Sharing
[ 12 21 15:14:28 2020]             ABAT    		Abort All Pending Transmissions
[ 12 21 15:14:28 2020]            REQOP = 0x04		Request Operation Mode
[ 12 21 15:14:28 2020]            OPMOD = 0x04		Operation Mode Status
[ 12 21 15:14:28 2020]            TXQEN   x		Enable Transmit Queue
[ 12 21 15:14:28 2020]             STEF   x		Store in Transmit Event FIFO
[ 12 21 15:14:28 2020]         SERR2LOM    		Transition to Listen Only Mode on System Error
[ 12 21 15:14:28 2020]            ESIGM    		Transmit ESI in Gateway Mode
[ 12 21 15:14:28 2020]            RTXAT    		Restrict Retransmission Attempts
[ 12 21 15:14:28 2020]           BRSDIS    		Bit Rate Switching Disable
[ 12 21 15:14:28 2020]             BUSY    		CAN Module is Busy
[ 12 21 15:14:28 2020]              WFT = 0x03		Selectable Wake-up Filter Time
[ 12 21 15:14:28 2020]           WAKFIL   x		Enable CAN Bus Line Wake-up Filter
[ 12 21 15:14:28 2020]           PXEDIS   x		Protocol Exception Event Detection Disabled
[ 12 21 15:14:28 2020]         ISOCRCEN   x		Enable ISO CRC in CAN FD Frames
[ 12 21 15:14:28 2020]            DNCNT = 0x00		Device Net Filter Bit Number

[ 12 21 15:14:28 2020] TBC: tbc(0x010)=0x00000000

[ 12 21 15:14:28 2020] VEC: vec(0x018)=0x40400040
[ 12 21 15:14:28 2020] 	rxcode: No Interrupt (0x40)
[ 12 21 15:14:28 2020] 	txcode: No Interrupt (0x40)
[ 12 21 15:14:28 2020] 	icode: No Interrupt (0x40)

[ 12 21 15:14:28 2020] INT: intf(0x01c)=0x00000000
[ 12 21 15:14:28 2020] 		IE	IF	IE & IF
[ 12 21 15:14:28 2020] 	IVMI				Invalid Message Interrupt
[ 12 21 15:14:28 2020] 	WAKI				Bus Wake Up Interrupt
[ 12 21 15:14:28 2020] 	CERRI				CAN Bus Error Interrupt
[ 12 21 15:14:28 2020] 	SERRI				System Error Interrupt
[ 12 21 15:14:28 2020] 	RXOVI				Receive FIFO Overflow Interrupt
[ 12 21 15:14:28 2020] 	TXATI				Transmit Attempt Interrupt
[ 12 21 15:14:28 2020] 	SPICRCI				SPI CRC Error Interrupt
[ 12 21 15:14:28 2020] 	ECCI				ECC Error Interrupt
[ 12 21 15:14:28 2020] 	TEFI				Transmit Event FIFO Interrupt
[ 12 21 15:14:28 2020] 	MODI				Mode Change Interrupt
[ 12 21 15:14:28 2020] 	TBCI				Time Base Counter Interrupt
[ 12 21 15:14:28 2020] 	RXI				Receive FIFO Interrupt
[ 12 21 15:14:28 2020] 	TXI				Transmit FIFO Interrupt

[ 12 21 15:14:28 2020] RXIF: rxif(0x020)=0x00000000
[ 12 21 15:14:28 2020] Receive FIFO Interrupt Pending bits:
[ 12 21 15:14:28 2020] 		-none-

[ 12 21 15:14:28 2020] RXOVIF: rxovif(0x028)=0x00000000
[ 12 21 15:14:28 2020] Receive FIFO Overflow Interrupt Pending bits:
[ 12 21 15:14:28 2020] 		-none-

[ 12 21 15:14:28 2020] TXIF: txif(0x024)=0x00000000
[ 12 21 15:14:28 2020] Transmit FIFO Interrupt Pending bits:
[ 12 21 15:14:28 2020] 		-none-

[ 12 21 15:14:28 2020] TXATIF: txatif(0x02c)=0x00000000
[ 12 21 15:14:28 2020] Transmit FIFO Attempt Interrupt Pending bits:
[ 12 21 15:14:28 2020] 		-none-

[ 12 21 15:14:28 2020] TXREQ: txreq(0x030)=0x00000000
[ 12 21 15:14:28 2020] Message Send Request bits:
[ 12 21 15:14:28 2020] 		-none-

[ 12 21 15:14:28 2020] TREC: trec(0x034)=0x00200000
[ 12 21 15:14:28 2020]             TXBO   x		Transmitter in Bus Off State
[ 12 21 15:14:28 2020]             TXBP    		Transmitter in Error Passive State
[ 12 21 15:14:28 2020]             RXBP    		Receiver in Error Passive State
[ 12 21 15:14:28 2020]           TXWARN    		Transmitter in Error Warning State
[ 12 21 15:14:28 2020]           RXWARN    		Receiver in Error Warning State
[ 12 21 15:14:28 2020]            EWARN    		Transmitter or Receiver is in Error Warning State
[ 12 21 15:14:28 2020]              TEC =   0		Transmit Error Counter
[ 12 21 15:14:28 2020]              REC =   0		Receive Error Counter

[ 12 21 15:14:28 2020] BDIAG0: bdiag0(0x038)=0x00000000
[ 12 21 15:14:28 2020]         DTERRCNT =   0		Data Bit Rate Transmit Error Counter
[ 12 21 15:14:28 2020]         DRERRCNT =   0		Data Bit Rate Receive Error Counter
[ 12 21 15:14:28 2020]         NTERRCNT =   0		Nominal Bit Rate Transmit Error Counter
[ 12 21 15:14:28 2020]         NRERRCNT =   0		Nominal Bit Rate Receive Error Counter

[ 12 21 15:14:28 2020] BDIAG1: bdiag1(0x03c)=0x00000000
[ 12 21 15:14:28 2020]            DLCMM    		DLC Mismatch
[ 12 21 15:14:28 2020]              ESI    		ESI flag of a received CAN FD message was set
[ 12 21 15:14:28 2020]          DCRCERR    		Data CRC Error
[ 12 21 15:14:28 2020]         DSTUFERR    		Data Bit Stuffing Error
[ 12 21 15:14:28 2020]         DFORMERR    		Data Format Error
[ 12 21 15:14:28 2020]         DBIT1ERR    		Data BIT1 Error
[ 12 21 15:14:28 2020]         DBIT0ERR    		Data BIT0 Error
[ 12 21 15:14:28 2020]          TXBOERR    		Device went to bus-off (and auto-recovered)
[ 12 21 15:14:28 2020]          NCRCERR    		CRC Error
[ 12 21 15:14:28 2020]         NSTUFERR    		Bit Stuffing Error
[ 12 21 15:14:28 2020]         NFORMERR    		Format Error
[ 12 21 15:14:28 2020]          NACKERR    		Transmitted message was not acknowledged
[ 12 21 15:14:28 2020]         NBIT1ERR    		Bit1 Error
[ 12 21 15:14:28 2020]         NBIT0ERR    		Bit0 Error
[ 12 21 15:14:28 2020]         EFMSGCNT =   0		Error Free Message Counter bits

[ 12 21 15:14:28 2020] -------------------- TEF --------------------
[ 12 21 15:14:28 2020] TEFCON: tefcon(0x040)=0x00000400
[ 12 21 15:14:28 2020]            FSIZE =   0		FIFO Size
[ 12 21 15:14:28 2020]           FRESET   x		FIFO Reset
[ 12 21 15:14:28 2020]             UINC    		Increment Tail
[ 12 21 15:14:28 2020]          TEFTSEN    		Transmit Event FIFO Time Stamp Enable
[ 12 21 15:14:28 2020]          TEFOVIE    		Transmit Event FIFO Overflow Interrupt Enable
[ 12 21 15:14:28 2020]           TEFFIE    		Transmit Event FIFO Full Interrupt Enable
[ 12 21 15:14:28 2020]           TEFHIE    		Transmit Event FIFO Half Full Interrupt Enable
[ 12 21 15:14:28 2020]          TEFNEIE    		Transmit Event FIFO Not Empty Interrupt Enable

[ 12 21 15:14:28 2020] TEFSTA: tefsta(0x044)=0x00000000
[ 12 21 15:14:28 2020]          TEFOVIF    		Transmit Event FIFO Overflow Interrupt Flag
[ 12 21 15:14:28 2020]           TEFFIF    		Transmit Event FIFO Full Interrupt Flag (0 = not full)
[ 12 21 15:14:28 2020]           TEFHIF    		Transmit Event FIFO Half Full Interrupt Flag (0= < half full)
[ 12 21 15:14:28 2020]          TEFNEIF    		Transmit Event FIFO Not Empty Interrupt Flag (0=empty)

[ 12 21 15:14:28 2020] TEFUA: tefua(0x048)=0x00000000

[ 12 21 15:14:28 2020] -------------------- TX_FIFO --------------------
[ 12 21 15:14:28 2020] FIFOCON: fifocon(0x05c)=0x00600400
[ 12 21 15:14:28 2020]           PLSIZE =   0		Payload Size
[ 12 21 15:14:28 2020]            FSIZE =   0		FIFO Size
[ 12 21 15:14:28 2020]             TXAT =   3		Retransmission Attempts
[ 12 21 15:14:28 2020]            TXPRI =   0		Message Transmit Priority
[ 12 21 15:14:28 2020]           FRESET   x		FIFO Reset
[ 12 21 15:14:28 2020]            TXREQ    		Message Send Request
[ 12 21 15:14:28 2020]             UINC    		Increment Head/Tail
[ 12 21 15:14:28 2020]             TXEN    		TX/RX FIFO Selection (0=RX, 1=TX)
[ 12 21 15:14:28 2020]            RTREN    		Auto RTR Enable
[ 12 21 15:14:28 2020]           RXTSEN    		Received Message Time Stamp Enable
[ 12 21 15:14:28 2020]           TXATIE    		Transmit Attempts Exhausted Interrupt Enable
[ 12 21 15:14:28 2020]           RXOVIE    		Overflow Interrupt Enable
[ 12 21 15:14:28 2020]         TFERFFIE    		Transmit/Receive FIFO Empty/Full Interrupt Enable
[ 12 21 15:14:28 2020]         TFHRFHIE    		Transmit/Receive FIFO Half Empty/Half Full Interrupt Enable
[ 12 21 15:14:28 2020]         TFNRFNIE    		Transmit/Receive FIFO Not Full/Not Empty Interrupt Enable

[ 12 21 15:14:28 2020] FIFOSTA: fifosta(0x060)=0x00000000
[ 12 21 15:14:28 2020]           FIFOCI =   0		FIFO Message Index
[ 12 21 15:14:28 2020]            TXABT    		Message Aborted Status (1=aborted, 0=completed successfully)
[ 12 21 15:14:28 2020]           TXLARB    		Message Lost Arbitration Status
[ 12 21 15:14:28 2020]            TXERR    		Error Detected During Transmission
[ 12 21 15:14:28 2020]           TXATIF    		Transmit Attempts Exhausted Interrupt Pending
[ 12 21 15:14:28 2020]           RXOVIF    		Receive FIFO Overflow Interrupt Flag
[ 12 21 15:14:28 2020]         TFERFFIF    		Transmit/Receive FIFO Empty/Full Interrupt Flag
[ 12 21 15:14:28 2020]         TFHRFHIF    		Transmit/Receive FIFO Half Empty/Half Full Interrupt Flag
[ 12 21 15:14:28 2020]         TFNRFNIF    		Transmit/Receive FIFO Not Full/Not Empty Interrupt Flag

[ 12 21 15:14:28 2020] FIFOUA: fifoua(0x064)=0x00000018

[ 12 21 15:14:28 2020]  -------------------- RX_FIFO --------------------
[ 12 21 15:14:28 2020] FIFOCON: fifocon(0x068)=0x00600400
[ 12 21 15:14:28 2020]           PLSIZE =   0		Payload Size
[ 12 21 15:14:28 2020]            FSIZE =   0		FIFO Size
[ 12 21 15:14:28 2020]             TXAT =   3		Retransmission Attempts
[ 12 21 15:14:28 2020]            TXPRI =   0		Message Transmit Priority
[ 12 21 15:14:28 2020]           FRESET   x		FIFO Reset
[ 12 21 15:14:28 2020]            TXREQ    		Message Send Request
[ 12 21 15:14:28 2020]             UINC    		Increment Head/Tail
[ 12 21 15:14:28 2020]             TXEN    		TX/RX FIFO Selection (0=RX, 1=TX)
[ 12 21 15:14:28 2020]            RTREN    		Auto RTR Enable
[ 12 21 15:14:28 2020]           RXTSEN    		Received Message Time Stamp Enable
[ 12 21 15:14:28 2020]           TXATIE    		Transmit Attempts Exhausted Interrupt Enable
[ 12 21 15:14:28 2020]           RXOVIE    		Overflow Interrupt Enable
[ 12 21 15:14:28 2020]         TFERFFIE    		Transmit/Receive FIFO Empty/Full Interrupt Enable
[ 12 21 15:14:28 2020]         TFHRFHIE    		Transmit/Receive FIFO Half Empty/Half Full Interrupt Enable
[ 12 21 15:14:28 2020]         TFNRFNIE    		Transmit/Receive FIFO Not Full/Not Empty Interrupt Enable

[ 12 21 15:14:28 2020] FIFOSTA: fifosta(0x06c)=0x00000000
[ 12 21 15:14:28 2020]           FIFOCI =   0		FIFO Message Index
[ 12 21 15:14:28 2020]            TXABT    		Message Aborted Status (1=aborted, 0=completed successfully)
[ 12 21 15:14:28 2020]           TXLARB    		Message Lost Arbitration Status
[ 12 21 15:14:28 2020]            TXERR    		Error Detected During Transmission
[ 12 21 15:14:28 2020]           TXATIF    		Transmit Attempts Exhausted Interrupt Pending
[ 12 21 15:14:28 2020]           RXOVIF    		Receive FIFO Overflow Interrupt Flag
[ 12 21 15:14:28 2020]         TFERFFIF    		Transmit/Receive FIFO Empty/Full Interrupt Flag
[ 12 21 15:14:28 2020]         TFHRFHIF    		Transmit/Receive FIFO Half Empty/Half Full Interrupt Flag
[ 12 21 15:14:28 2020]         TFNRFNIF    		Transmit/Receive FIFO Not Full/Not Empty Interrupt Flag

[ 12 21 15:14:28 2020] FIFOUA: fifoua(0x070)=0x00000028

[ 12 21 15:14:28 2020] mcp25xxfd spi0.0 can0: ------------------------- end -------------------------

Sorry, We didn’t test on Jetson NX.

Hi,

Thanks I have verified on NX, works fine.

I’m glad to hear that.