I guess it is a HUGE mistake if we have overlooked this post! Thank you so much for posting the ideas, which are really beyond our wildest internal brainstorming. Current DSO nano is more a prototyping level device, It will be our responsibility and top priority to improve such be-loved product with community wit!
We might not be able to consolidate so many wonderful ideas into one ultimate super mega DSO, BUT it would be more fun to brew a basic portable platform with vast extensibility. By adding an efficient and stable API, you could easily modify and even load additional apps to extend the software functionality. We will create some wiki and SVN to host/Sponsor the projects for sure.
I will keep you guys posted for the schedule, and open for any other suggestions and inputs.
Hi all, I just got my DSO Nano v 1.3 two days ago . It took me a while to figure out how to disassemble it (hint use a razor or Xacto to gently peel off the front label, remove 6 small screws).
I already knew that the Battery Charger-Power Supply circuit was an issue. Yes there is a protection circuit built-in the battery, but charging with a Schottky diode and a 1 Ohm resistor will guaranty short battery life. I have designed a fix which actually cost less than the original circuit. This will require a change in the PCB. (I have tried to load this to here, but every format I try is rejected. it is available as a MS Word. doc, and PDF)
I have a question: The test waveform showing quite a bit of peaking. Why? (Capacitors C0, C5, C3A, C4A, C6A are not installed)
I have also been thinking about the input amplifier IC, TL082. This is not the best (it is really happier with more voltage on the +/- power pins, it is noisy, and it has limited bandwidth) for this use.
A differential amplifier would be much better. This would eliminate some noise and allow using shielded twisted pair wire (like that use in tie clip microphones) which would eliminate more noise. This would require that the tip and ring of the input connector be brought to the main board, which should be easy. I have some ICs in mind, one of which has programmable (serial) gain from 0 to >-50 dB.
A couple of capability questions: can you use smaller parts (i.e. QFN)? Many of the newer ICs are only available in smaller package.
Is SeeedStudio making the small PCB with the pushbuttons? It would be better to put the input amplifier there, where it can be easily shielded. Moving the amplifier here would also allow different versions (i.e. differential, AC-DC, single ended, multiplexed 2 channels, etc)
I saw a comment about storing different set-ups. This should be to the memory card (perhaps 8 memories). It would require choosing “Save Image” or “Save Set Up” when saving.
The circuit is from Microchip and Fairchild: “Li-Ion System Power Path Management Reference Design”, document # DS51746A, 2008, pages 5 & 12. The FET – Diode combination was made by Fairchild for this specific application (disconnect battery when external power is present).
The cost for both ICs: FDFMA2P853 and MCP73832 are $0.64 USD at DigiKey.com. For reference, the LTC4054 is $1.82.
I am an older analog hardware electrical engineer, who is always amazed by the fantastic things microcontroller designers and programmers can accomplish. Also amazing is the difficulty they have with analog circuits. I am willing to help Seeedstudio with the DSO Nano, since it is a fantastic product and they are generous with Open Source activities.
i’m also willing to help in the DSO hardware redesign. This circuit could be a nice start, as the battery charger is a weak point in the DSO nano. Probably, the only drawback of this circuit are the switching times due to capacities and the dropout voltages when the battery is low (as XC6203 needs at least 300mV@200mA) . But, i don’t know if people at seedstudio are capable to test the proposed solutions (Freezing, ESP… any feedback?).
With the minimum USB voltage of 4.5 V, the output to power switch is well over 4 V, allowing adequate margin for the 3.6V supply and the two regulator ICs:XC6206P302 and XC6206P332.
When operating from the battery, as long as there is more than 3.0V from the battery, all should be good. The 3.3 V regulator would not be regulating, but the 3.0V battery voltage will still pass through. The ST uController operates at 3V. The only use for the 3.3 V is the SD card. Many SD cards will work at 3.0 V, but many will not.
The 3.6V is used for the +/- 5V supply boost regulator SP3232. This, unlike many switched capacitor power circuits, has regulated outputs, regardless if the actual input voltage. I think using this IC is a bit of genius on the part of SeeedStudio. It is also the output buffer for the test signal, with a guaranteed rise and fall time into high capacitance loads.
Most importantly, if you want to discharge the battery to near 3.0 Volts, it will have a significantly shorter life.
i’ll try to explain to you although i have only a couple of minutes right now.
When circuit is USB powered, no problem at all.
If circuit is battery powered, as there is some current consumption, there will be a voltage drop across transistor. Supposing transistor has 100 mOhm and circuit draws 200 mA => 200mV. If battery is only a bit discharged (say 3.5V) then the regulator (3.0V) is operating in its limits of regulation (not really, but near).
The SD card isn’t the problem here (many of them work in the 2.7V-3.6V range) nor the Cortex (2V-3.6V) but the ADC reference. ADC uses VDDA to reference the VREF+ so if battery voltage drops say 3.3V (as the current in the VDDA branch is lower), we are losing accuracy in the DSO readings.
Of course, i consider this a trade off and otherwise the circuit looks very good to me.
Slimfish
Note1: i agree that the SP3232 trick is a neat one, but the output regulation is far from ideal (no linear regulator inside, it uses a discontinous mode with a 5.5V treshold).
I started to draw the schematic in EAGLE format. I have modified a little your original schematic because i thought R21 (1Ohm) and the 10K resistor are not needed. Maybe should we keep R21 for current limiting purposes in the switching process, but i think thats not an issue.
Circuit diagram is in the image below. It’s also necessary to reduce the charging current a little in order to reserve some of the USB current to power the DSO Nano.
The MCP73831 has a pin to indicate if battery charging is complete. So maybe it can be used to report charging status in screen (only one digital pin needed).
R21 was added by Seeedstudio in Rev 1.3 of the PCB. It looks like a current limiting device, but its real function is a fuse. Since there is no charging IC, if the battery & diode shorts, the power dissipation in the 1 Ohm resistor is nearly 100 x the rating of this 402 device, so it will open.
You are right, this resistor is not necessary with a functioning charge control IC.
The 10 K resistor I added is not necessary, since R25 and R26 will discharge C16 and turn on the FET.
Normally the standard charge rate for these batteries is C/10, which in this case would be 0.5 Ah/10= 50 mA per hour. This means a fully discharged battery would take 10 hours to charge. Without more information about the battery, I suggest a compromise of 100 mA charge current, yielding a full charge in 5 hours. This would require R27 = 10,000 (10k) Ohms.
Connecting the “charge state” pin to the uC should be straight-forward. The IC has a version with a 3 state output indicating “charging” and “charging finished” (MCP73831, same cost).
There are excellent Battery & Power Management ICs from many vendors which could be used, but they cost significantly more (>2-5x).
NOTE to all in this post: two of the outstanding features of the DSO Nano which attracted me are the price and size. While firmware features and PCB traces have no production costs, hardware parts do. If portable full featured, 2 channel DS scope is what you want, they are available for $500 - $600 (i.e. Hantek and Owon). Many of the choices made by SeeedStudio is this design were obviously made with getting the most performance for the least price. So while we can suggest improvements, try to keep in mind these factors.
as i bought DSO a few months ago maybe the capacity has increased but the battery my DSO has is 680 mA (at least in the markings). Although standard charging rate is safer for the batteries, i think something slightly greater than the standard charging rate can be used (say C/4 or C/3). Charging it in three or four hours seems a good battery life/usability constraint.
I agree with you in the fact that DSO is attractive because is small and cheap. But i also think that hardware can be enhanced for a few (<5) bucks more. And that’s where the funny game starts.
I also think that this circuit in particular can`t be improved much more. So maybe it’s time for others to comment on it (if they found any flaw) and to proceed with other DSO blocks.
My next proposals:
-Power management (simple). If you forget the switch on -> battery dead. This is a mix of hardware and software, but if there is no hardware to support it, software will never “use” it.
-Dual channel input (complex). Duplicating the hardware is the obvious solution. I want to make a better aproximation. This point could try to address
*Variable input impedance of actual stage (1 MOhm is only in the manual)
*AD+DC measurements. Actually the harware support some kind of AC measurement (thanks to PWM feedback) but as far as i know, it has been never implemented in software.
*Noise
*Automatic calibration
-Signal output (medium)
Enough for today. By the way Seeedstudio… it will be very interesting to have some feedback from you!!!
Thanks Shazam and Slimfish, I’m a bit dazzled about your conversation. Seeed didn’t design the circuits, you may see from the box that it’s the work of Mr. Cai Xiaoguang (aka Bure if you read the source code), a very veteran electrical engineer and luckily our closest partner. We are more apprentices in this product, I’m consolidating all available resources from inside and outside Seeed Studio to make DSO nano better.
I’m keeping consolidating the ideas from forum, blog ,email or anywhere I can see them. We will add the charging circuit in next revision soon, along with other improvements <5$ for current version. I will generate a list of fix/improvement/TBD soon.
For SP3232, we will modify it in the next version with TC1240.
Thank you so much for the suggestions! I will get back to you soon.
I am working on a better input amplifier already. It is busy where I work, so it may take several nights. My goal is to also eliminate the '4051 switch. I am also thinking about equalization for the X1 and X10 probes.
If you are thinking of using the TC1240, I suggest looking at the TI TPS60403, which is almost 1/2 the cost.
This function (power supply for the input amplifier) should be chosen to match the requirements circuits (ICs) of the input amplifier.
I will keep you updated with what I find for a better input amplifier circuit soon.
in my last message, i proposed a few DSO areas that could be improved. As i think input stage was the most difficult (and interesting one) of the list, i started with that.
My basic design goals:
-Cheap enough (<$5)
-Input impedance 1 MOhm for the whole input range (x10 probe friendly)
-AC+DC capable
-More accurate & less noisy
-Easy to calibrate (Offset + gain)
Other less important goals:
-Small size
-Single supply (while conserving ground for reference)
-Easily extendable to dual channel
The image below shows the designed circuit. As depicted is dual-channel, but can be easily ported to single channel. The integrated circuits used don’t have to be those exactly. Input stage AD8615 (single op-amp) can be replaced by a cheaper dual op-amp version (AD8616) or by less capable version (like AD8602). Both op-amps are from Analog Devices, but any other that fits input noise, input current, Vos & GBW parameters can also be valid.
For the programmable gain amplifier a LTC6912 is used. It’s digitally controllable, dual channel, low noise and has an integrated midsupply. Other alternatives exist and can also be used with minor modifications/additions (MAX9939, PGA113, AD8231…).
In terms of cost, TL082, SP3232, HC51 are not needed anymore so althought initial IC cost is near the $5 for the dual channel version, the final cost will be lower.
As i said in a previous message, this schematic is only a schematic (a very first draft of it). Althought i made some minor simulation of it, it’s necessary to build it to check if everything works as expected. I expect to build it in a few days to validate it. In the meantime, all comments/suggestions/complaints are welcome.
I have finally had some time to spend on the Programmable Gain Input stage. Slimfish, the PGA ICs you list and the LTC you feature in the schematic all have different characteristics. The LTC6912 has poor input characteristics (low impedance) so it requires the two op amp buffers you added. Another issue is there is No way to adjust the offset on a large scale. This is likely used to adjust the vertical position of the trace by the U10 pin PB11 ST uC.
After having evaluated the parts you list and many more, the TI PGA113 will provide the High Input Impedance, Low Capacitance, Low Offset & Drift, Self Calibration, and a Reference Input which can be used to move the trace vertically. It also has two separate power supply pins, one for the amplifier and one for the output buffer to match the ADC in the ST uC. The PGA113 has a two channel multiplexer, a high constant impedance and the bandwidth, noise, distortion and drift are more than adequate for the DSO Nano.
It runs off the existing +5 and +3 V power supplies (does not require an +/- supply) and does not need a separate input buffer. So this eliminates the U4, U5, and U7 ICs. Note that U7 also is the output buffer for the test signal (U10 pin PD 12), so a small buffer op amp will be needed.
To use this part, close attention will be needed to properly de-couple the power supplies, filter the PWM out from U10 pin PB11 for a clean DC offset voltage (may also require a Buffer Op Amp), and layout and shielding to minimize noise. The inputs should have a 10,000 Ohm or higher resistor in series to limit overload. A 100 kOhm HV resistor would be better (protects to 1000V input) but it may affect the max bandwidth a bit.
The part is less than $2.00 (about $1.00 in a full reel quantity).
Another possibility is to use the TI PGA117, which has 10 multiplexed inputs. This would add the ability to use it as a 2 channel analog input with an additional 8 channels of logic. Unfortunately this would require something like a 10 pin 1 mm header and a cut out in the case to access the connector for the 8 Logic Inputs. I suspect that the uC would require additional memory (external) as well. Just a thought.
Auto Power Off and DC Input. I think most people would not want a simple Auto Power Off, unless it could be adjusted for time and disabled. This may cost more than it is worth. With a good charging circuit, battery life should be good, and when connected to external USB power, it is not an issue. Small USB power supplies are readily available for a few dollars on e-bay and elsewhere. DC input would be difficult to implement, especially with some Overload Protection for the DSO Nano.
i’m very glad to receive some feedback from you. Although i want to comment some of the points you addressed, i would like to start with a short explanation of how the circuit i posted works.
The most important concern for me was the 1MOhm input range. So everything is built arround this. The input stage is done with IC1, which is configured as an inverting amplifier with a gain of G=1/30. This way, all DSO range (±40V) is supported without modifying the input impedance. Obviously there are many other solutions, but they generally involve the use of manual switches, reles or solid state switches (optocoupled or similar). None of them are suitable here (size, cost, current consumption). Main disadvantege is the small signals are also divided by 30.
Capacitors C5 & C7 are needed to propagate fast signals. Input impedance is so high that even the OA input capacitance would act as a low pass filter. They conform a capacitive divider which propagates fast signals and have to be properly matched with the resistive divider and hence the 647pF (non standard value) value on C5. Whitout these capacities input stage simply won’t work for “high frequencies”. The advantages over the original circuit are mainly two: there is only a capacitor to tune (C5) and input impedance is 1Mohm for the whole input range.
What is it important for the AO at this point? I considered these factors: offset (static + drift), input current, CMRR, noise (V, I) and GBP (Gain Bandwidth Product) and supply range. Doing some math with the AD8601 values (big numbers - refered to DSO INPUT):
CH_A offset (due to input current): 0.2 pA * 1 MOhm = 0.2 uV
CH_A offset (due to input offset): 80 uV * (967K/33K) = 2.42 mV
There are a couple of components not yet explained in the input stage: IC2 & C1. These two conform the AC/DC input selection. The idea is to have C1 shorted for the DC measurements and open for AC. I think is important to have an AC measurement mode, useful when you have to measure the ripple of a signal, a small signal with a big DC offset, etc. In the original circuit this was done by modifiying non-inverting input in IC5 amplifier with a filtered PWM signal.
The presented circuit won’t work. Inverting input is not referenced to any point and the input current will charge C1 either to VCC or GND in case of an AC measurement. And the leakage of IC2 is orders of magnitude greater than IC1 input current, so this is a big no-no. In order to have a working circuit, this capacitor has to be connected between IC1 output and the input of the LTC.
After the input stage comes the amplifier. The input signal has been divided and offseted (also inverted) by IC1 to modify its range to 0…3 V for a -40…40 V input. Now it’s time to amplify it a little in order to sample it. At this point, input impedance of the second amplifier has no importance as it’s sourced by IC1. The important factors now are offset, input noise, GBP and gains.
First of all, the LTC. I’ve also considered the PGA113. I have worked with it in a couple of designs and performs very good for the price. But i partially discarded it for a couple of reasons. Offset, drift, noise and multiplexer are better than fine, but GWP is only 8MHz. That means 3dB attenuation @ 380 kHz (page 5 of datasheet) with a 10 kOhm load and G=100. And that is a lot of attenuation. It’s true that G=100 would be the 10 mV/div scale, but it is something to account for. Also, VREF input is not a high impedance one so an extra opamp is required to set bias level. In contrast, LTC6912 has 33MHz GWP and with an integrated midsupply (VREF). Obviously, the input impedance is lower, but that is not a point here as the first amplifier is needed in any case. And for the other input characteristics, noise is similar and Vos is higher for the LTC but small enough (125 uV typ.) to not be a concern.
The offset adjust you mention initially puzzled me. The original scope doesn’t have an AC measurement mode, so modifying reference to have a pseudo AC mode is a good aproximation… but better than an AC mode itself? I don’t think so. In any case, its easy to modify the non-inverting input of the first amplifier to do that (as the original scope do). Using Vref in PGA113 for the same function it’s not possible unless you have an input buffer to convert the DSO input range to 0…3 V.
If you plan to make PGA inputs the DSO input with a 10K resistor then two problems arise: input impedance is undefined and PGA inputs will function well within supply ranges but input clamp diodes will do its work beyond 0…VCC. If the resistor is 100K then another one is added: input current is 1.5 nA, so input offset will be displaced 0,15 mV. It’s very likely that i don’t get the whole picture well, so please clarify connections.
Two channel analog input its worth when the two channels are sampled at the same time. Although PGA117 switches very fast (200 ns), it must be commanded to do so, which takes enough time itself to hinder its use in higher (100 ksps) sampling rates. And AFAIK the uC has to ADCs.
I don’t really know what people want. But if i forget the DSO switch on and the battery gets depleted (3 hour) resulting in a dead battery, then i will be certainly upset. Leaving apart that a single “usual” mistake has costed me 10+ Bucks & 15 days (delivery).
Thank you so much for the designs!
As for the manufacturing part, I have done the sourcing a bit, seems mouser and digikey don’t have much stock of either PGA113 or LTC6912. Not sure if it is temporary long term shortage, but the lead time might be too long for practical manufacturing. I will be checking both from local market and propose to Mr. Bure to integrate into future design.
in the picture below i draw what could be the input stage schematic with the PGA113. This time is draw in protel as i use it more frequently than EAGLE.
Please note that despite my comments to shazam, both circuits are substantially better than the original in many ways (constant input impedance, AD/DC modes, precision, size…) and both are designed to be simple to calibrate and to control. The drawback is that both are more expensive than the original one. Maybe the PGA113 is even cheaper as it replaced a lot of circuits (U7, U4, U5) and components.
I hope the integration into a future design could be done as soon as possible, as i’m looking forward to get a dual channel DSO Nano.
Note: there is another input configuration possible in which one of the PGA113 inputs measure AC signal and the other measures only DC component of the signal (low pass filter). This way we have both precision in AC and in DC.
Note2: if PGA113 is difficult to get, you can try with PGA112 (binary gains instead of scope ones -see datasheet-)
. It took me a while to figure out how to disassemble it (hint use a razor or Xacto to gently peel off the front label, remove 6 small screws).
