Yeah, that’s the one.
The FPGA seems to have internal diodes to the 2.8V voltage rail. They limit at 3V, so the 5V ESD diode does not do much.
My concern is mostly >3V input voltages on the digital pins. The FPGA’s diodes should be adequate to limit that. I’m not sure about ESD, but as you said, it’s less likely to occur.
I have some measurements here:
koti.kapsi.fi/jpa/stuff/pix/dso_ … urrent.png
It’s probably safe to use it up to some 1mA input current.