It’s because of bad choice of ESD diodes on the digital inputs. They have too much capacitance and don’t really even limit the voltages.
There are suggestions for replacement diodes on these forums.
Myself I’ve been thinking about just taking those diodes out. They are 5V diodes, while the FPGA internally limits at 3.3V - therefore it should work just the same without the diodes and have much better digital bandwidth. But I haven’t tried it yet so it’s anyones own risk.
Currently digital channels have worse bandwidth than analog channels. Analog channels can show USB full-speed (12MHz) but digitals can not.