Log from debug port. Part One:
[0000.066] I> MB1 (version: 0.32.0.0-t234-54845784-57325615)
[0000.072] I> t234-A01-0-Silicon (0x12347) Prod
[0000.076] I> Boot-mode : Coldboot
[0000.079] I> Emulation:
[0000.081] I> Entry timestamp: 0x00000000
[0000.085] I> last_boot_error: 0x0
[0000.088] I> BR-BCT: preprod_dev_sign: 0
[0000.092] I> rst_source: 0x0, rst_level: 0x0
[0000.096] I> Task: Bootchain select WAR set (0x5000ba65)
[0000.101] I> Task: Enable SLCG (0x5000bab1)
[0000.105] I> Task: CRC check (0x5001ea19)
[0000.109] I> Task: Initialize MB2 params (0x5000cb51)
[0000.115] I> MB2-params @ 0x40060000
[0000.118] I> Task: Crypto init (0x5001d981)
[0000.122] I> Task: Secure debug controls (0x5000c0a9)
[0000.127] I> Task: strap war set (0x5000ba2d)
[0000.131] I> Task: Initialize SOC Therm (0x5001bd35)
[0000.136] I> Task: Program NV master stream id (0x5000c05d)
[0000.142] I> Task: Verify boot mode (0xd4820f1)
[0000.148] I> Task: Alias fuses (0x5001095d)
[0000.152] W> FUSE_ALIAS: Fuse alias on production fused part is not supported.
[0000.159] I> Task: Print SKU type (0x5000f5f1)
[0000.163] I> FUSE_OPT_CCPLEX_CLUSTER_DISABLE = 0x000001c0
[0000.169] I> FUSE_OPT_GPC_DISABLE = 0x00000001
[0000.173] I> FUSE_OPT_TPC_DISABLE = 0x0000000f
[0000.177] I> FUSE_OPT_DLA_DISABLE = 0x00000000
[0000.181] I> FUSE_OPT_PVA_DISABLE = 0x00000000
[0000.186] I> FUSE_OPT_NVENC_DISABLE = 0x00000000
[0000.190] I> FUSE_OPT_NVDEC_DISABLE = 0x00000000
[0000.194] I> FUSE_OPT_FSI_DISABLE = 0x00000001
[0000.199] I> FUSE_OPT_EMC_DISABLE = 0x00000000
[0000.203] I> FUSE_BOOTROM_PATCH_VERSION = 0x7
[0000.207] I> FUSE_PSCROM_PATCH_VERSION = 0x7
[0000.211] I> FUSE_OPT_ADC_CAL_FUSE_REV = 0x2
[0000.215] I> FUSE_SKU_INFO_0 = 0xd3
[0000.219] I> FUSE_OPT_SAMPLE_TYPE_0 = 0x3 PS
[0000.223] I> FUSE_PACKAGE_INFO_0 = 0x2
[0000.226] I> SKU: Prod
[0000.229] I> Task: Boost clocks (0x500148a1)
[0000.233] I> Initializing PLLC2 for AXI_CBB.
[0000.237] I> AXI_CBB : src = 35, divisor = 0
[0000.241] I> Task: Voltage monitor (0x50014b49)
[0000.245] I> VMON: Vmon re-calibration and fine tuning done
[0000.251] I> Task: UPHY init (0x5000d065)
[0000.257] I> HSIO UPHY init done
[0000.260] E> Skipping GBE UPHY config
[0000.263] I> Task: Boot device init (0x50000be9)
[0000.268] I> Boot_device: QSPI_FLASH instance: 0
[0000.273] I> Qspi clock source : pllc_out0
[0000.277] I> QSPI Flash: Macronix 64MB
[0000.280] I> QSPI-0l initialized successfully
[0000.284] I> Task: TSC init (0x50020a4d)
[0000.288] I> Task: Load membct (0x50011fe9)
[0000.292] I> RAM_CODE 0x4000401
[0000.295] I> Loading MEMBCT
[0000.298] I> Slot: 0
[0000.300] I> Binary[0] block-0 (partition size: 0x40000)
[0000.305] I> get_binary_info: Binary name: MEM-BCT-0
[0000.310] I> Size of crypto header is 8192
[0000.314] I> BCH load address is : 0x40050000
[0000.318] I> Size of crypto header is 8192
[0000.322] I> BCH of MEM-BCT-0 read from storage
[0000.327] I> BCH address is : 0x40050000
[0000.331] I> MEM-BCT-0 header integrity check is success
[0000.336] I> Binary magic in BCH component 0 is MEM0
[0000.341] I> component binary type is 0
[0000.345] I> MEM-BCT-0 binary is read from storage
[0000.350] I> MEM-BCT-0 binary integrity check is success
[0000.355] I> Binary MEM-BCT-0 loaded successfully at 0x40040000 (0xe580)
[0000.362] I> RAM_CODE 0x4000401
[0000.367] I> RAM_CODE 0x4000401
[0000.371] I> Task: Load Page retirement list (0x500115b1)
[0000.376] I> Task: SDRAM params override (0x50011fc5)
[0000.381] I> Task: Save mem-bct info (0x50014fa1)
[0000.386] I> Task: Carveout allocate (0x50015005)
[0000.390] I> RCM blob carveout will not be allocated
[0000.395] I> ECC region[0]: Start:0x0, End:0x0
[0000.399] I> ECC region[1]: Start:0x0, End:0x0
[0000.403] I> ECC region[2]: Start:0x0, End:0x0
[0000.408] I> ECC region[3]: Start:0x0, End:0x0
[0000.412] I> ECC region[4]: Start:0x0, End:0x0
[0000.416] I> Non-ECC region[0]: Start:0x80000000, End:0x480000000
[0000.422] I> Non-ECC region[1]: Start:0x0, End:0x0
[0000.427] I> Non-ECC region[2]: Start:0x0, End:0x0
[0000.431] I> Non-ECC region[3]: Start:0x0, End:0x0
[0000.436] I> Non-ECC region[4]: Start:0x0, End:0x0
[0000.446] I> allocated(CO:31) base:0x478000000 size:0x8000000 align: 0x8000000
[0000.453] I> allocated(CO:43) base:0x474000000 size:0x4000000 align: 0x200000
[0000.460] I> allocated(CO:20) base:0x472000000 size:0x2000000 align: 0x2000000
[0000.467] I> allocated(CO:24) base:0x470000000 size:0x2000000 align: 0x2000000
[0000.474] I> allocated(CO:28) base:0x46e000000 size:0x2000000 align: 0x2000000
[0000.481] I> allocated(CO:22) base:0x46d000000 size:0x1000000 align: 0x1000000
[0000.488] I> allocated(CO:35) base:0x46c200000 size:0xe00000 align: 0x10000
[0000.495] I> allocated(CO:02) base:0x46b800000 size:0x800000 align: 0x800000
[0000.502] I> allocated(CO:03) base:0x46b000000 size:0x800000 align: 0x800000
[0000.509] I> allocated(CO:06) base:0x46a800000 size:0x800000 align: 0x800000
[0000.516] I> allocated(CO:10) base:0x46a000000 size:0x800000 align: 0x800000
[0000.523] I> allocated(CO:56) base:0x469800000 size:0x800000 align: 0x200000
[0000.530] I> allocated(CO:07) base:0x469400000 size:0x400000 align: 0x400000
[0000.537] I> allocated(CO:33) base:0x469000000 size:0x400000 align: 0x200000
[0000.544] I> allocated(CO:23) base:0x46c000000 size:0x200000 align: 0x200000
[0000.550] I> allocated(CO:01) base:0x468f00000 size:0x100000 align: 0x100000
[0000.557] I> allocated(CO:04) base:0x468e00000 size:0x100000 align: 0x100000
[0000.564] I> allocated(CO:05) base:0x468d00000 size:0x100000 align: 0x100000
[0000.571] I> allocated(CO:08) base:0x468c00000 size:0x100000 align: 0x100000
[0000.578] I> allocated(CO:09) base:0x468b00000 size:0x100000 align: 0x100000
[0000.585] I> allocated(CO:15) base:0x468a00000 size:0x100000 align: 0x100000
[0000.592] I> allocated(CO:17) base:0x468900000 size:0x100000 align: 0x100000
[0000.599] I> allocated(CO:27) base:0x468800000 size:0x100000 align: 0x100000
[0000.606] I> allocated(CO:42) base:0x468700000 size:0x100000 align: 0x100000
[0000.613] I> allocated(CO:54) base:0x468680000 size:0x80000 align: 0x80000
[0000.620] I> allocated(CO:34) base:0x468670000 size:0x10000 align: 0x10000
[0000.626] I> allocated(CO:47) base:0x468200000 size:0x400000 align: 0x200000
[0000.633] I> allocated(CO:72) base:0x468000000 size:0x200000 align: 0x10000
[0000.640] I> allocated(CO:48) base:0x468650000 size:0x20000 align: 0x10000
[0000.647] I> allocated(CO:69) base:0x468630000 size:0x20000 align: 0x10000
[0000.654] I> allocated(CO:49) base:0x468620000 size:0x10000 align: 0x10000
[0000.660] I> allocated(CO:50) base:0x468610000 size:0x10000 align: 0x10000
[0000.667] I> NSDRAM base: 0x80000000, end: 0x468670000
[0000.672] I> Task: Thermal check (0x50021d55)
[0000.676] I> max_chip_limit = 105
[0000.679] I> min_chip_limit = -28
[0000.683] I> max temp read = 42
[0000.685] I> min temp read = 40
[0000.688] I> Task: Update FSI SCR with thermal fuse data (0x50021e61)
[0000.695] I> Task: Enable WDT 5th expiry (0x50021a41)
[0000.700] I> Task: I2C register (0x50000b85)
[0000.704] I> Task: Reset FSI (0x500148b1)
[0000.708] I> Task: Pinmux init (0x5001397d)
[0000.712] I> skipped mmio_addr = 0x9240008
[0000.716] I> skipped mmio_addr = 0x9240000
[0000.720] I> skipped mmio_addr = 0x9240010
[0000.724] I> skipped mmio_addr = 0x9240018
[0000.728] I> skipped mmio_addr = 0x9240020
[0000.732] I> skipped mmio_addr = 0x9240030
[0000.736] I> skipped mmio_addr = 0x9240028
[0000.739] I> skipped mmio_addr = 0x9240038
[0000.743] I> skipped mmio_addr = 0x9240040
[0000.747] I> skipped mmio_addr = 0x9240048
[0000.751] I> skipped mmio_addr = 0x9241000
[0000.755] I> skipped mmio_addr = 0x9241008
[0000.759] I> skipped mmio_addr = 0x9241010
[0000.763] I> skipped mmio_addr = 0x9241018
[0000.767] I> skipped mmio_addr = 0x9241020
[0000.771] I> skipped mmio_addr = 0x9241028
[0000.775] I> skipped mmio_addr = 0x9241030
[0000.779] I> skipped mmio_addr = 0x9241038
[0000.783] I> skipped mmio_addr = 0x9241040
[0000.787] I> skipped mmio_addr = 0x9242000
[0000.791] I> skipped mmio_addr = 0x9242008
[0000.795] I> Task: Prod config init (0x50013ddd)
[0000.799] I> Task: Pad voltage init (0x50013a2d)
[0000.803] I> Task: Prod init (0x50013e21)
[0000.807] I> Task: Common rail init (0x50014575)
[0000.812] I> DONE: Thermal config
[0000.816] W> DEVICE_PROD: module = 13, instance = 4 not found in device prod.
[0000.824] I> DONE: SOC rail config
[0000.828] W> PMIC_CONFIG: Rail: MEMIO rail config not found in MB1 BCT.
[0000.835] I> DONE: MEMIO rail config
[0000.839] W> PMIC_CONFIG: Rail: GPU rail info not found in MB1 BCT.
[0000.845] I> DONE: GPU rail info
[0000.849] W> PMIC_CONFIG: Rail: CV rail info not found in MB1 BCT.
[0000.855] I> DONE: CV rail info
[0000.858] I> Task: Mem clock src (0x50011de9)
[0000.862] I> Task: Misc. board config (0x5001461d)
[0000.867] W> PMIC_CONFIG: Platform config not found in MB1 BCT.
[0000.873] I> Task: SDRAM init (0x50011ded)
[0000.877] I> SDRAM-params @ 0xd485000
[0000.880] I> MemoryType: 4 MemBctRevision: 1
[0000.887] I> MSS code-drop: NvBootSdramInit
[0000.891] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevisio1
[0000.899] I> MSS CAR: PLLM/HUB programming for MemoryType: 4 and MemBctRevisio1
[0000.906] I> MSS CAR: Init PLLM
[0000.909] I> MSS CAR: Init PLLHUB
[0000.914] I> Encryption: MTS: en, TX: en, VPR: en, GSC: en
[0000.925] I> mb1_sdram_init Done !
[0000.928] I> SDRAM Size in Total 0x400000000
[0000.933] I> Task: Dram Ecc scrub (0x500116f5)
[0000.937] I> Task: DRAM alias check (0x50011fbd)
[0000.955] I> Task: Program NSDRAM carveout (0x50015961)
[0000.961] I> NSDRAM carveout encryption is enabled
[0000.966] I> Program NSDRAM carveout
[0000.971] I> Task: Register checker (0x50011fc1)
[0000.978] I> Task: Enable clock-mon (0x50020a35)
[0000.984] I> FMON: Fmon re-programming done
[0000.988] I> Task: Mapper init (0x5001ef4d)
[0000.993] I> Task: SC7 Context Init (0x50020d3d)
[0000.999] I> Task: CCPLEX IST init (0x5000c925)