150 samples is a bit more than 1 division short of half way down the screen. There’s no hardware limitation. The default is set in the FPGA at 150 and it can be changed by the program, but the program continually resets the trigger and every time it does the FPGA resets the pre-trigger to 150. All of this can be changed. I always thought 150 samples of pre-trigger was enough but I suppose it could be useful to make it adjustable.