Hello everyone,
I’ve just bought the DSO203 and i’ve a noob question.
I need the X/Y mode for tests on my Chua’s circuit and if i read right, the WC5 could be fine for this purpose.
I’ve HW 2.81 SYS 1.64 and DFU3.45C
Have i to copy only the app1.hex file to the DSO?
UPDATE: found it --> <LINK_TEXT text=“http://www.seeedstudio.com/forum/viewto … =26&t=6359”>http://www.seeedstudio.com/forum/viewtopic.php?f=26&t=6359</LINK_TEXT>
Have i to calibrate the DSO after the WC5 installation?
UPDATE: Seems no, someone have suggestions?
Thanks in advance
Luca
You do not need to calibrate the device for it to function properly in X-Y mode. There may be some DC offsets though when using it in normal scan mode which will shift the baseline off from the channel indicator. At the least, the auto calibrate part can be done for each channel, this will remove excessive DC offsets. For the voltage calibration part that comes after the auto calibrate the entry fields can just be left blank. Just shift through them with the right toggle to get to the end and save the results. Voltage calibration is provided to improve waveform amplitude and voltage meter accuracy.
To properly use the X-Y mode, keep in mind that the timebase and number of samples used will affect the quality of the display, and will need to be adjusted to the frequency of the signal to get the best results (see the user guide for more info). A bit of experimentation will be helpful to get familiar with this mode.
Ok so for now i can work with the current DSO status
Yes i saw that i have to “play” with CH A and CH B voltage measure and timebase on X/Y mode to fine tune the circuit on a perfect chaos state. For the rest i can obtain a really good “double scroll” image. I’ll post some images if someone is interested.
For firmware work: really good job mate, thank you Wildcat and your predecessors, you really saved the day.
Luca
Hello everyone,
recently i found out, that DSO FW still developing by Wildcat.
For that - thank You very much! I was trying to install one old app from PetteriAimonen’s QuadPawn
and found out that on the new HW (2.81) it won’t work - that’s i’ll try to fix. To test my toolchain i built Wildcat’s app - got it 100% working, 100% speed preserved, but the size of it concerns me - 344kb instead of original 434kb. Wildcat, is it wrong or?.. Used GCC 4.8.3 (linaro) + newest binutils (2.25.1).
The size of the executables can vary wildly depending on what compiler optimizations you use. With a different compiler version, I’m not surprised you are getting a different size. As long as everything works properly I would say it’s OK…
I know that - but i use the same optimisations as you are: -O2. Already tried out GCC 5.3 (it generated even more compact code - 323 kb), this time after successful build app not starting. My point was to free some space for Quad Pawn - but it seems it’s not enough (device refuses existing pawn 101k image - it won’t work, that’s only to check if it will be loaded).
And one more detail - i loaded all from Windows10 without any issues (except DSO should be connected to the PC after entering DFU mode - otherwise Windows recognises unknown device).
I suspect you are getting different sizes because of the different compiler versions. I’m using a much earlier version.
As far as Pawn is concerned, all my recent versions leave enough room for it as it installs in slot 4. I noticed that Pawn did not work with HW 2.81, this might have something to do with file access issues as it was originally written for 2MB devices. Also Pawn instals code in the second half of the ROM, this was for the updated file access for early devices and is loaded in the 0x40000 to 0x48000 section. The second part of my app versions load after this so as to not overwrite it.
from us9igy
Interesting find!!! I tried the same with my Win 10 and everything worked OK. Wonder what causes this Win 10 problem?
I was hesitant in updating my Win 8.1 to 10 because I wanted to insure I had access to my Quad. It seems there is now a “work-around”.
Thanks us9igy!!
Good job for Wildcat 5.0!
I’ve just tried it, very nice!
I like especially shortcuts
Thanks
how many slots need Wildcat 5.0?
can I install Wildcat 5 and Gabonator ? because I try Wildcat5 in slot1 and Gabonator in slot3 but seen corrupted
¿?
…on other hand need master code for HW2.72 and licence 9420c38f, by unknown reason I can’t post and ask in <LINK_TEXT text=“http://www.minidso.com/forum.php?mod=fo … lay&fid=54”>http://www.minidso.com/forum.php?mod=forumdisplay&fid=54</LINK_TEXT>
if anybody can give me the code I will be grateful
not sure if corrupted is because lack this code. each time power on ds0203 ask me the code. and power on oscilloscope after press some buttons
Version 5.0 needs the first 3 slots, so any additional programs will need to be loaded in slot 4, but
it also uses memory in the second half of the ROM area, which Gabonator’s program also uses, so
they are not compatible.
Wildcat 4.4, downloadable from page 41 has a special “3 slot” version that is compatible with Gabonator’s program
that uses only the first 3 slots and nothing in the second half. Gabonator will have to be loaded in
slot 4.
Not sure why you need to input your license code, loading both programs on a version 2.72 HW device
should not have affected the DFU.
Note that Gabonator’s program has not as far as I know been updated to work on the later hardware versions.
Not sure where compatibility ends, but it will overwrite the FPGA on HW 2.81.
Thanks for your response. I need Gabonator because have some extra interesting programs as spectrum analyser, logic analyser and response frecuency . Have wildcat similar ?
Would be grateful if you explain better the use of ROM in dso203 ?
Yes, of course. License code don’t have any effect on wildcat or garbonator but my dso203 bricked time ago. I repair it and now ask me the code each time I power on ( real HW2.72 and licence 9420c38f)
Hi Wildcat,
on this place, I want say to you: Thanks a lot for your work over all the time and different HW Versions 
I don’t tell you unknown thinks, if I say, that other FW Versions are not so good supported as your once.
I’m owner of a DS203 HW2.81 for a very small time. After some experince how to walk through the menu’s (and I have not reached 100% of them till now ) I can say :
Good and nice work! Thank you!
There was no problem to change the SW to your Version and I’m happy to use the small nice tool, because it’s very fast beside me and in the most of the cases the measurement from the DS is enough. The Fluke need more time to get it out from the Store-Place, prepare all things, need more place on the table …
Just to let everyone know, even with DFU 3.45C some programs like Wildcat 4.1-4.4 (i haven't tested any newer yet) will FAIL to install on certain machines, even if you use windows xp. I had problems for many months, and the solution was to use a different PC. My laptop uses HM55 chipset don't know why there is incompatibility. Many thanks again to Wildcat for developing awesome software :)
Edit: Just tried WC5, i installed the FPGA under windows 10 and the problematic machine without any issues, again the hex had to be done from the other much older machine running winxp (although it is not an OS problem)
I am new to this device. Need a little assistance in installing Wildcat V5.0 on new DSO Quad. HV2.81 DSO SYS Ver 1.64
ReadMe in Wildcat V5.0 download /FPGA said:
Install by first copying the FPGA_281.ADR file to DFU virtual disk.
When volume reappears, copy 281_FPGA.BIN to DFU virtual disk. -------- Install these first?
What other files to copy to DFU virtual disk for firmware? With 2 files for FPGA?
Thank You in advance for the help. 
You will want to also install app1.hex. But first, after copying the 2 FPGA files, disconnect the device and shut it down, then boot up the DFU again, reconnect, then copy app1.hex.
If doesn’t really matter which you install first, but the 2 FPGA files must be installed together, without rebooting between them. The first (ADR) tells the DFU where to install the FPGA code, so it must be loaded first. Addressing for the HEX file is built-in, so it does not need an ADR file.
Just finished another program/FPGA update for HW V2.81, however, in the course of development, I ran into an issue with the hardware and I need help to find out how prevalent this is. The update adds a “full speed” buffer mode which samples at 72Ms/sec for all timebases.
The issue I ran into was parasitic bit toggling on ch A when using the updated FPGA (see bottom screenshot). Ch B was not affected. The problem was finally isolated to the ADC chip: Heating the IC would make this disappear, while cooling it made it worse. It should be noted though that when switching back and used with the previous FPGA versions, the noise was not seen. Apparently the added functions in the updated FPGA somehow seemed to be causing this.
However, after replacing the ADC IC with an Analog Devices unit the problem completely disappeared, showing no traces of the noise whatsoever when used with the new FPGA.
Hopefully this was an isolated problem with my particular device, and not common with the ADC’s that come with the later V2.81 units. Again, my device showed no signs of this until using the new FPGA update, and when changing back to earlier FPGA versions everything worked as it did before, while replacing the chip totally eliminated the problem.
So until I can get some feedback from other users on this I would have to consider it as a “test” version to establish the viability of posting any future FPGA updates.
WITH THIS IN MIND:
When used on HW 2.81 with accompanying revised FPGA V1.1:
Added full speed oversampling buffer mode: Will sample at full 72Ms/sec at all times, providing ~10MHz bandwidth without aliasing for all timebases, except at very slowest (50Ms/div and longer) where the rate is gradually reduced to maintain a maximum of 60,000 x OS ratio. Combines features of both digital and analog scopes. Cycle with right toggle center button: Single window > Averaging > 8x OS > Full speed sampling > Large buffer. Buffer notification will turn blue to indicate mode. Sampling speed for this mode can be changed from default of 72Ms/sec in steps down to 2Ms/sec if desired by holding button 2 for more than 3 sec while menu is on Time/Div adjust item while in full speed mode. Change with left toggle and save with boot config 0. Additional info is included in user’s guide.
By it’s very nature, this mode will capture and display any noise, no matter how intermittent, whether it’s generated from within the scope or from an outside source. For example, an intermittent ground strap between the display frame and gen out jack was also causing accumulated noise.
Once the ADC was replaced and the ground repaired, this worked quite well, increasing the sensitivity of the instrument in a very useful way. For example, when used at timebases of around 1mS/div and slower, where the display can keep up with incoming data, the mode provides continuous ~10MHz bandwidth sampling without any “dead time” or aliasing, with the ability to capture any signal or noise pulse, no matter how narrow or intermittent.
Other fixes with this update: (effective when used on all HW device versions)
-Fixed analog channels offset from each other, visible at highest 0.1uS/div when used with certain ADC’s found in later devices (shows as a 4-5 pixel offset due to interpolation). This was present with all versions from 3.3 and later due to the removal of interlace mode reset; for some reason all SYS versions set interlace on boot-up. ADC’s used on earlier devices do not seem to be affected, so this went on unnoticed.
-Added horizontal trace thickness adj: with menu on backlight adj, press RIGHT toggle (button 6) to toggle thickness adjustment menu, change with left toggle (2 steps with full speed OS, 3 with all others). Note that “vertical bright adjust” (see user guide for more info) can also be toggled in this way while in backlight menu with LEFT toggle center button. Save settings in boot menu 0. Display changes with these as well as the ADC offset adj can now be observed while changing.
-Added frequency display as alternative to delta time for Time cursors. Highlight T cursor display as sub menu item (T1 > T2 > Display), toggle between time or corresponding frequency with left toggle.
-Fixed UART generator function at times transmitting random buffer contents if trying to load a non existing file, also fixed file save function number display prematurely increasing value if file already exists.
-Trigger delay function is now disabled in oversampling modes.
-User guide has been updated.
50 nS overshoot pulses captured on a 10Hz square wave without aliasing in full speed buffer mode. On right the same pulse is expanded to 0.1uS/div.
Trace can now be adjusted for horizontal thickness.
Parasitic bit toggling in the ADC while in full speed OS mode on ch A. Ch B not affected. After replacing the IC, everything worked properly…
Hi WildCat, congratulations for your good work, I use it everyday and I find it very useful,
however I can’t find the pre-trigger function, in other words it seems not possible to move in time the trigger point.
It would be very useful to have it because I’m triggering a signal and I want to see what happens before it in SINGLE mode.
Do you have in mind to implement such a function?
Loaded in Wildcat 5.1 easy on Windows 7 with DSO Quad plugged into USB2.0 port. I wanted to reproduce Wildcats test of ADC but do not know what source of sine wave is. It looks like on picture of screen that wave generator on DSO203 was not used. I want to do exactly the same just in case.
All modes have 150 samples (5 divisions or a bit less than half a screen width) pre-trigger.
The actual trigger point is at the vertical orange trigger cursor, the one that moves when shifting XPOS. Anything to the left of this cursor is the pre-trigger section. If the window is shifted all the way to the left with XPOS, the orange trigger cursor will appear to move to the right towards the middle of the screen. The window and cursor (along with the waveform if triggered) will slow down at the very end to provide fine positioning.
In Single mode, the buffer defaults to the large buffer format, even when the buffer is set to single window. In large buffer mode, the window can be shifted down the length of the entire buffer with the XPOS control, some 10 windows width so if it is shifted to the right, the trigger point along with the pre-trigger section may not be visible unless you bring the window all the way back to the start at the extreme left. The small rectangle at the bottom of the screen will show the position of the window in relation to the buffer.
If the buffer is set to one of the oversampling or averaging modes, the buffer length will be one window’s width plus the pre-trigger section, even in single mode. In this case the window can only be shifted to the right a little ways, just enough to bring the trigger point to the left of the screen.
So in summary, to see the pre-trigger section, simply shift the window all the way to the left with XPOS, until the orange trigger cursor moves to the right towards the center of the screen.