v1.21 ∆T on 500ms and 1s bug
∆V bug
I couldn’t reproduce the issue.
Are you using the correct sys and fpga?
Yes, I’m using sys1.6 from macrosin and fpga 2.61.
In fact, this problem maybe is something about the hardware, because I find not like the schma, the v- is -2.8v but not -3v.
Now I have a v+ of 3v, maybe is the difference between V+ and v- caused this problem.
But after the calibration, other values are corrected. Is the RMS has a different way of calculation?
RMS is always positive, by definition.
Thanks for this firmware, feels better than the stock firmware. I just installed v1.21, after playing around with some 1Mhz spi signal (<LINK_TEXT text=“http://neophob.com/2012/03/lpd6803-spi- … -distance/”>http://neophob.com/2012/03/lpd6803-spi-and-long-distance/</LINK_TEXT>) I discovered some issues:
[list]
thanks again for you time and effort!
cheers
michu
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Thanks for the report, but please check your SYS and FPGA versions.
I say this because, as you can see from the screenshots I posted, the app actually has no problems with the blue color channel.
thanks pmos69, just to be sure I should update to the SYS version from marco (<LINK_TEXT text=“https://sites.google.com/site/marcosina … ronica/dso”>https://sites.google.com/site/marcosinatti/elettronica/dso</LINK_TEXT>), currently v1.8? that would be SYS25116.hex, correct (my quad use the hardware model v2.6)? there is also an fpga222 file inside, but my quad has FPGA261 preinstalled, so I do nou update fgpa files?
thanks
Edit: now I’m confused… the official SYS151 was released on the 2011-11-15 by seeed, however the SYS25116.hex file has a timestamp of 2011-11-12, so 3 days older… and to make thing even more complicated I found this ftp site <LINK_TEXT text=“ftp://shodtech.net/DSO_Quad/marcosin_ch … nary_V1.7/”>ftp://shodtech.net/DSO_Quad/marcosin_changes/binary_V1.7/</LINK_TEXT>, there is the same SYSFile (compared by content) but with another timestamp…
just an idea, i would make things alot easier for newbies (like me) you add the needed sys/fgpa files or reference to them in the text file.
Edit: I just reread the readme file, you write:
Tested with:
- SYS 1.50 1.6 from Marco Sinatti
- FPGA 2.61
- HW 2.6
I reinstalled my fpga v2.61 file(from seeed), the sysfile from marco sinatti (SYS25116.hex) and DSO203 GCC v1.21. see attached screenshot to see my start screen. my screenshot still misses the blue color… any hints whats wrong?
I just want to let know that v1.21 fixes triggering. Nice release. Thanks!
I fixed the RMS bug which is only in my DSO. 
:?:
I modified some thing in menu.c like this:
</s>case RMS:
if(Meter[i].Track == TRACK1){
if (_1_source == HIDE) Tmp=0;
else {
Tmp =(Ka2[_A_Range]*Int_sqrt(a_Ssq/bag_max_buf)+ 512)/1024; // use bag_max_buf as average divider
if(Tmp <= 4) Tmp = 0; // round of precision error
Tmp *= Y_Attr[_A_Range].SCALE;
if (_1_source == CH_X10) Tmp=Tmp*10;
}
}
if(Meter[i].Track == TRACK2){
if (_2_source == HIDE) Tmp=0;
else {
Tmp =(Kb2[_B_Range]*Int_sqrt(b_Ssq/bag_max_buf)+ 512)/1024; // use bag_max_buf as average divider
if(Tmp <= 4) Tmp = 0; // round of precision error
Tmp *= Y_Attr[_B_Range].SCALE;
if (_2_source == CH_X10) Tmp=Tmp*10;
}
}<e>
Maybe is a little strange,
but in my situation, I find that when Vin=0, a_Ssq and b_Ssq are 0. If I add a Ka1[_A_Range] in Tmp, the RMS is bigger than actual.
Can I debug it directly with a ST-link?
Thanks,
I ordered a DSO Quad and should receive it soon. Mean time I wonder if anybody can refer me somewhere with exact procedure, step by step, as to what should be upgraded and which files replaced and how?
This particular firmware some of you are generously consolidating looks to be a very good one and far better and more useful than the one that comes pre-installed. First, thank you! It’s really appreciated (I wish I could contribute, but I have never really compiled any program ) Second, as above, what are the steps so that I can use this firmware?
Hi Dan,
installing some software on the DSO Quad is much more simple than you might think (and is explained in this thread (first message - which I quote after the link - but just read the general procedures after the quote):
<LINK_TEXT text=“http://www.seeedstudio.com/forum/viewto … =22&t=1929”>http://www.seeedstudio.com/forum/viewtopic.php?f=22&t=1929</LINK_TEXT>
an even better guide is this one here:
<LINK_TEXT text=“http://hifiduino.wordpress.com/2011/04/ … art-guide/”>http://hifiduino.wordpress.com/2011/04/30/dso-quad-quick-start-guide/</LINK_TEXT>
You can do all that upgrading or softwarechanging, after you connect the DSO Quad to your PC via USB and while turning on the DSO Quad, pressing the first button "►||" on the left of your DSO Quad. (It will then show up as a drive on your PC)
--> The firmware/software for the DSO Quad consists of 4 things:
[list]
and if you wish
the FPGA and the logo consists of 2 Files each: you first have to “send to” or “copy/paste” into the DSO Quad drive a / the “xxx.ADR” file followed by the matching “xxx.bin” file
–> “xxxFPGAxxx.ADR” and the “xxxFPGAxxx.bin” for the FPGA and “xxxlogoxxx.ADR” followed by “xxxlogoxxx.bin” for the Logo
APP and SYS are “xxx.hex” files and for those, you only “send to” or copy/paste a/the “xxx.hex” files to the DSO Quad drive - the DSO Quad then automatically reboots and reconects with your PC, showing a “xxx.rdy” file on the DSO Quad drive.
The combination of FPGA, SYS or the APP is what seems to be an issue, as all have been updated several times and based on on or the other code, SYS and APPs have been improverd or developed - but there is not much that can happen to the DSO quad
Thanks for the good work.
On my DSO I noticed a discrepancy in generator frequency and displayed frequency.
Edit: Latest Marcosin SYS file shall be used (thanks Jerson!, see next post)
I remember having this same problem. Please check that you have the latest Marcosin SYS file. See the sticky post on this thread which explains what you need.
Hi elfe111,
Thank you very much fir the links and information!
Pedro
Thanks for your excellent work on this build (v1.21). One minor bug that I have not been able to sort out.
When triggering from Chan A, on manual, down transition, 2ms per div, it works perfectly on full buffer mode, but when I switch to short buffer mode, it appears to trigger OK about one sweep in 3 or 4, and then free-run for the next 2 or 3 sweeps.
If you have any ideas where I might look in the code, I’m happy to try to sort it out, but I’m not sure where to look to start with.
Thanks again
Dave
Jerson, just to be sure, can you post a screenshot of your start screen? Mine looks like this http://seeedstudio.com/forum/download/file.php?id=1026
My DSO still suffer of the strange scerenshots…
Sure. Here it is.
thanks! looks like mine (except i use app v1.21)… hmmm why then is my screenshot function strange? did you use the fgpa version from seeed?
cheers
I have the latest FPGA - don’t remember the URL. However, to make it easy for you, this is what is loaded on my quad.